M62420SP Renesas Electronics Corporation., M62420SP Datasheet

no-image

M62420SP

Manufacturer Part Number
M62420SP
Description
Manufacturer
Renesas Electronics Corporation.
Datasheet

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
M62420SP
Manufacturer:
SKYWORKS
Quantity:
453
Part Number:
M62420SP
Manufacturer:
MITSUBIS
Quantity:
20 000
M62420SP/ FP/ AFP
2ch Electronic Volume with Tone by I
Description
M62420SP/FP/AFP is the tone and volume controller which is controlled by I
application because of low noise and distortion.
M62420AFP changes the slave address from M62420FP.
Features
Applications
Recommended Operating Condition
System Block Diagram
Rev.1.0, Sep.17.2003, page 1 of 16
TONE(Bass/Treble) control and 1 dB step volume control are enabled.
Low noise and low distortion .
V
Controlling by serial data in conformity to the I
TV, Mini-Stereo, etc
Supply voltage range: 8.5 to 9.5 V (analog)
Rated supply voltage: 9 V (analog)
NO
Lch IN
Rch IN
= 4.5 µVrms, CTHD=0.1% max
I C BUS INTERFACE
2
VOLUME
VOLUME
SCL
5 V (digital)
SDA
4.5 to 5.5 V (digital)
2
C bus format .
2
M62420SP/FP
TONE CONTROL
TONE CONTROL
C Bus System
BASS TREBLE
BASS TREBLE
2
C bus. This IC can apply the broad
REJ03F0051-0100Z
Lch OUT
Rch OUT
Sep.17.2003
Rev.1.0

Related parts for M62420SP

M62420SP Summary of contents

Page 1

... M62420SP/ FP/ AFP 2ch Electronic Volume with Tone by I Description M62420SP/FP/AFP is the tone and volume controller which is controlled by I application because of low noise and distortion. M62420AFP changes the slave address from M62420FP. Features TONE(Bass/Treble) control and 1 dB step volume control are enabled. ...

Page 2

... M62420SP/ FP/ AFP Block diagram and Pin Configuration 20 19 VR2 ref ref VR1 ref 1 Rev.1.0, Sep.17.2003, page 1.8K VR4 VR6 SIMAMP2 136K ref TONE AMP2 6.5K 6.5K VOLAMP2 VOLAMP1 6.5K 6.5K TONE AMP1 ref VR5 136K SIMAMP1 VR3 1. CONTROL LOGIC BUS INTER ...

Page 3

... M62420SP/ FP/ AFP Pin Description Pin No. Pin Name I/O Description 1 REF I Reference voltage terminal for analog 2 CH1 IN I Input terminal (ch1) 3 SIMIN1 I Pin for capacitor of simulated inductor 1 4 SIMOUT 1 O Pin for capacitor of simulated inductor 1 5 BASS1 I Pin for capacitor of ch1-side bass setting ...

Page 4

... M62420SP/ FP/ AFP Thermal Derating Curves 1000 800 600 400 200 0 Recommended Operating Condition ( unless otherwise noted) Item Analog supply voltage Digital supply voltage H level input voltage (logic circuit) H level input voltage (logic circuit) Rev.1.0, Sep.17.2003, page 750mW 550mW FP 375mW 275mW 25 50 ...

Page 5

... M62420SP/ FP/ AFP Electrical Characteristics (DC 25°C, AVDD = 9 V, DVDD = 5 V and tone, bassboost = 0 dB unless otherwise noted ) (1) Supply voltage Item Analog supply current Digital supply current (2) I/O CHARACTERISTICS Item Maximum input voltage Output voltage Gain Output noise voltage Total harmonic distortion ...

Page 6

... M62420SP/ FP/ AFP Function Explanation (1) Equivaration Circuit of Tone Control The resonance circuit is able to construct by using built-in amplifier for simulated inductor. (Shows the constant as follow (=1.8K ) ref FIG1. The circuit used simurated inductor. ref L C1 FIG2. The equivalent circuit used L. Rev.1.0, Sep.17.2003, page ...

Page 7

... M62420SP/ FP/ AFP BUS Input Data Format Input direction ( 1 ) slave S address starting term acknowledge bit ( 1 ) Slave address M62420SP / M62420AFP sub address subA7 subA6 subA5 empty slot Rev.1.0, Sep.17.2003, page sub A A address acknowledge bit The following sub address is defined at this IC. subA4 subA3 ...

Page 8

... M62420SP/ FP/ AFP ( 3 ) -1: volume control The volume control is enabled at following condition. subA0 : subA1 : volume code D4 D3 ATT 0dB H H 2dB H H 4dB H H 6dB H H 8dB H H 10dB H H 12dB H H 14dB H H 16dB L H 18dB H L 20dB H L 22dB H L 24dB ...

Page 9

... M62420SP/ FP/ AFP ( tone level control The tone level controlling is enabled at following condition. subA0 : 0 (both bits are 0) subA1 : 0 tone code D7 D6 12dB 10dB L H 8dB L 6dB 4dB L L 2dB L L 0dB L -2dB -4dB L H -6dB H H -8dB H H -10dB -12dB Mute mode The mute mode is enabled at following condition ...

Page 10

... M62420SP/ FP/ AFP DATA and CLOCK (IN (OUT) S start start This term is defined by SDA(in) falling edge at SCL H . stop This term is defined by SDA(in) rising edge at SCL H . CAUTION The SDA(IN) level never change at SCK=H data transmisson The SDA(IN) is enabled at SCL rising edge and H . acknowledge Transmitter must send H during ninth clock pulse of SCL . ...

Page 11

... M62420SP/ FP/ AFP BUS Line Timing Specification SDA HD:STA SU:DAT V IL SCL LOW S Parameter Min. input low voltage Max. input high voltage SCL clock frequency Time the bus must be free before a new transmission can start Hold time start condition. After this period the first clock pulse is generated ...

Page 12

... M62420SP/ FP/ AFP Level Diagram CH1 IN VOLAMP1 ref G1 0dB to -dB 136K ref CH2 IN Rev.1.0, Sep.17.2003, page 6.5K 1.8K same to CH1 -12dB to +12dB 6.5K G2 CH1 OUT TONEAMP1 CH2 OUT ...

Page 13

... M62420SP/ FP/ AFP Logic Circuit Sub-address latch circuit Acknowledge generator Bi-direct SDA control SCL Rev.1.0, Sep.17.2003, page TONE AMP1 Level shifter Decoder, latch for tone control Slave address compare circuit Timing generator Shift register ANALOG BLOCK ref VOLAMP1 Decoder, latch for volume control ...

Page 14

... M62420SP/ FP/ AFP Application Example 2.2 F IN2 VCC 10K Reference circuit example 470 F 4.7K Reference 4.7K voltage IN1 2.2 10K Rev.1.0, Sep.17.2003, page ref 0.033 F 0.47 F 0.022 F 1. 1.8K VR4 VR6 SIMAMP2 136K ref TONE AMP2 6.5K VR2 6.5K ref VOLAMP2 VOLAMP1 ref 6 ...

Page 15

... M62420SP/ FP/ AFP Package Dimensions Rev.1.0, Sep.17.2003, page ...

Page 16

... M62420SP/ FP/ AFP c Rev.1.0, Sep.17.2003, page ...

Page 17

Sales Strategic Planning Div. Keep safety first in your circuit designs! 1. Renesas Technology Corp. puts the maximum effort into making semiconductor products better and more reliable, but there is always the possibility that trouble may occur with them. Trouble ...

Related keywords