CY7C09269V-6AC Cypress Semiconductor Corporation., CY7C09269V-6AC Datasheet
CY7C09269V-6AC
Specifications of CY7C09269V-6AC
Related parts for CY7C09269V-6AC
CY7C09269V-6AC Summary of contents
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... CY7C09269V CY7C09279V CY7C09289V CY7C09369V CY7C09379V CY7C09389V3.3V 16K/32K/64K x 16/18 Synchronous Dual-Port Static RAM 1CY7C025/0251 Features • True Dual-Ported memory cells which allow simulta- neous access of the same memory location • 6 Flow-Through/Pipelined devices — 16K x 16/18 organization (CY7C09269V/369V) — 32K x 16/18 organization (CY7C09279V/379V) — ...
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... When writing simultaneously to the same location, the final value cannot be guaranteed. 7. This pin is NC for CY7C09269V. 8. This pin is NC for CY7C09269V and CY7C09279V. 9. For CY7C09269V and CY7C09279V, pin #18 connected to V compatible to an IDT 5V x16 flow-through device. Document #: 38-06056 Rev HIGH on CE ...
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... CY7C09269V/79V/89V CY7C09369V/79V/89V A8R 74 A9R 73 A10R 72 A11R 71 A12R 70 A13R 69 A14R [10] 68 A15R [11] 67 LBR 66 UBR 65 CE0R 64 CE1R 63 CNTRSTR 62 R/WR 61 GND 60 OER 59 FT/PIPER 58 I/O17R 57 GND 56 I/O16R 55 I/O15R 54 I/O14R 53 I/O13R 52 I/O12R 51 I/O11R CY7C09269V/79V/89V CY7C09369V/79V/89V -9 - 135 115 µA 10 µA Page [+] Feedback ...
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... Output Current into Outputs (LOW)............................. 20 mA Static Discharge Voltage............................................ >1100V Latch-Up Current...................................................... >200mA ° ° +150 C Operating Range ° ° +125 C Range Commercial +0.5V Industrial CC +0.5V CC CY7C09269V/79V/89V CY7C09369V/79V/89V AND CE must be asserted MAX –I/O ). 8/9L 15/17L Ambient Temperature V CC ° ° 3.3V ± 300 mV ...
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... Indust. 10 250 Com’l. 105 135 95 125 Indust. 125 170 Test Conditions ° MHz 3.3V CC and CE must be asserted to their active states ( CY7C09269V/79V/89V CY7C09369V/79V/89V -9 -12 2.4 2.4 V 0.4 0.4 V 2.0 2.0 V 0.8 0.8 V µA –10 10 –10 10 135 230 115 180 mA 185 300 ...
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... TH OUTPUT 1.4V TH (b) Thévenin Equivalent (Load 1) [14] 3.0V 10% GND ≤ Capacitance (pF) (b) Load Derating Curve CY7C09269V/79V/89V CY7C09369V/79V/89V 3. 590Ω OUTPUT 435Ω (c) Three-State Delay (Load 2) (Used for & t CKLZ OLZ OHZ including scope and jig) ALL INPUT PULSES 90% 90% 10% ≤ ...
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... Port to Port Delays t Write Port Clock HIGH to Read Data Delay CWDD t Clock to Clock Set-Up Time CCS Notes: 15. Test conditions used are Load 2. 16. This parameter is guaranteed by design, but it is not production tested. Document #: 38-06056 Rev. *B CY7C09269V/79V/89V CY7C09369V/79V/89V CY7C09269V/79V/89V CY7C09369V/79V/89V [ 100 83 67 ...
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... n+1 t OHZ [17, 18, 19, 20 CL2 A A n+1 n+2 t CD2 CKLZ = following the next rising edge of the clock constantly loads the address on the rising edge of the CLK. Numbers are for reference only. IL CY7C09269V/79V/89V CY7C09369V/79V/89V n+3 t CKHZ Q n OLZ n n+1 n+2 t OHZ t OLZ ...
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... CD2 HC CD2 SC CKHZ CKLZ [23, 24, 25, 26] NO MATCH t CD1 NO MATCH t CWDD VALID . for the Left Port, which is being written to. IH CY7C09269V/79V/89V CY7C09369V/79V/89V CD2 CKHZ CKLZ CD2 CKHZ CD2 CKLZ t CD1 VALID >maximum specified, then data is not valid CWDD CCS Page [+] Feedback ...
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... During “No Operation”, data in memory at the selected address may be corrupted and should be rewritten to ensure data integrity. Document #: 38-06056 Rev. *B [20, 27, 28, 29 n+1 n CD2 CKHZ OPERATION [20, 27, 28, 29 n+1 n+2 n n+2 n+3 t CD2 OHZ WRITE . IH CY7C09269V/79V/89V CY7C09369V/79V/89V A A n+3 n CD2 CKLZ Q n+3 WRITE READ A A n+4 n CKLZ CD2 Q n+4 READ Page [+] Feedback ...
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... DATA OUT OE Document #: 38-06056 Rev. *B [18, 20, 28, 29 n+1 n+2 n n+2 t CD1 Q n+1 t CKHZ NO READ OPERATION [18, 20, 27, 28, 29 n+1 n+2 n n+2 n OHZ READ WRITE CY7C09269V/79V/89V CY7C09369V/79V/89V n+3 n CD1 CD1 Q n CKLZ DC WRITE READ A A n+4 n CD1 t CD1 Q n CKLZ DC READ Page [+] Feedback ...
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... Document #: 38-06056 Rev. *B [30 SAD HAD t t SCN HCN t CD2 n+1 COUNTER HOLD READ WITH COUNTER [30 n+1 n+2 READ WITH COUNTER . CY7C09269V/79V/89V CY7C09369V/79V/89V Q Q n+2 n+3 READ WITH COUNTER t t SAD HAD t t SCN HCN Q n+3 READ COUNTER HOLD WITH COUNTER Page [+] Feedback ...
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... The “Internal Address” is equal to the “External Address” when ADS = V Document #: 38-06056 Rev. *B [31, 32 n+1 n+1 n+2 WRITE WITH WRITE COUNTER COUNTER HOLD . IH and equals the counter output when ADS = V IL CY7C09269V/79V/89V CY7C09369V/79V/89V n+2 n+3 n n+3 n+4 WRITE WITH COUNTER . IH Page [+] Feedback ...
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... SD DATA DATA OUT COUNTER RESET Notes: 33 UB, and 34. No dead cycle exists during counter reset. A READ or WRITE cycle may be coincidental with the counter reset. Document #: 38-06056 Rev WRITE READ ADDRESS 0 ADDRESS 0 ADDRESS 1 CY7C09269V/79V/89V CY7C09369V/79V/89V n n READ READ ADDRESS n Page [+] Feedback ...
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... CNTRST I/O Mode Reset out( Load out( Hold out( Increment out(n+ CY7C09269V/79V/89V CY7C09369V/79V/89V Operation [38] Deselected [38] Deselected Write [35] Read Outputs Disabled Operation Counter Reset to Address 0 Address Load into Counter External Address Blocked—Counter Disabled Counter Enabled—Internal Address Generation Page [+] Feedback ...
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... Ordering Information 16K x16 3.3V Synchronous Dual-Port SRAM Speed (ns) Ordering Code [1, 2] 6.5 CY7C09269V-6AC CY7C09269V-6AXC [2] 7.5 CY7C09269V-7AC CY7C09269V-7AXC 9 CY7C09269V-9AC CY7C09269V-9AXC CY7C09269V-9AI 12 CY7C09269V-12AC CY7C09269V-12AXC 32K x16 3.3V Synchronous Dual-Port SRAM Speed (ns) Ordering Code [1, 2] 6.5 CY7C09279V-6AC CY7C09279V-6AXC [2] 7.5 CY7C09279V-7AC CY7C09279V-7AXC 9 CY7C09279V-9AC CY7C09279V-9AI ...
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... Pb-Free Thin Quad Flat Pack A100 100-Pin Thin Quad Flat Pack A100 100-Pin Pb-Free Thin Quad Flat Pack A100 100-Pin Thin Quad Flat Pack A100 100-Pin Pb-Free Thin Quad Flat Pack CY7C09269V/79V/89V CY7C09369V/79V/89V Operating Range Commercial Commercial Commercial Commercial Industrial Commercial ...
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... The inclusion of Cypress products in life-support systems application implies that the manufacturer assumes all risk of such use and in doing so indemnifies Cypress against all charges. CY7C09269V/79V/89V CY7C09369V/79V/89V ...
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... Document History Page Document Title: CY7C09269V/79V/89V CY7C09369V/79V/89V 3.3V 16K/32K/64K X 16/18 Synchronous Dual Port Static RAM Document Number: 38-06056 Issue Orig. of REV. ECN NO. Date Change ** 110215 12/18/01 *A 122306 12/27/02 *B 344354 See ECN Document #: 38-06056 Rev. *B Description of Change SZV Change from Spec number: 38-00668 to 38-06056 ...