S2060C AMCC (Applied Micro Circuits Corp), S2060C Datasheet
S2060C
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S2060C Summary of contents
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DEVICE SPECIFICATION GIGABIT ETHERNET TRANSCEIVER GIGABIT ETHERNET TRANSCEIVER FEATURES • Operating rate • 1250 MHz (Gigabit Ethernet) line rates • Half and full VCO output rates • Functionally compliant IEEE 802.3z Gigabit Ethernet standard • Transmitter incorporating Phase-Locked Loop (PLL) ...
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S2060 S2060 OVERVIEW The S2060 transmitter and receiver provide serial- ization and deserialization functions for block en- coded data to implement a Gigabit Ethernet interface. The S2060 functional block diagram is de- picted in Figure 2. The sequence of operations ...
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GIGABIT ETHERNET TRANSCEIVER TRANSMITTER DESCRIPTION The S2060 transmitter accepts 10-bit parallel input data and serializes it for transmission over fiber optic or coaxial cable media. The chip is fully compatible with the IEEE 802.3z Gigabit Ethernet standard, and supports the ...
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S2060 RECEIVER DESCRIPTION Whenever a signal is present, the receiver attempts to recover the serial clock from the received data stream. The S2060 searches the serial bit stream for the occurrence of a positive polarity COMMA sync pattern (0011111xxx positive ...
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GIGABIT ETHERNET TRANSCEIVER The COM_DET output signal is ACTIVE whenever EN_CDET is active and the COMMA control charac- ter is present on the RX[0:9] parallel data outputs. The COM_DET output signal will be INACTIVE at all other times. Parallel Output ...
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S2060 Table 5. Pin Description and Assignment ...
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GIGABIT ETHERNET TRANSCEIVER Table 5. Pin Description and Assignment (Continued ...
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S2060 Table 6. Power and Ground Signals ...
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GIGABIT ETHERNET TRANSCEIVER Figure 3. S2060 Pinout (S2060A, S2060B, S2060D) 1 VEE 2 TX[0] TX[ TX[2] VCC 5 6 TX[3] TX[4] 7 TX[ TX[6] VCC 10 TX[7] 11 TX[ TX[9] RATEN 14 15 AVEE ...
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... S2060 Figure 4. S2060 Pinout (S2060C) 1 VEE 2 TX[0] TX[ TX[2] VCC 5 6 TX[3] TX[4] 7 TX[ TX[6] VCC 10 11 TX[7] TX[ TX[9] RATEN 14 15 AVEE 16 TC1 Thermal Management GIGABIT ETHERNET TRANSCEIVER S2060C TOP VIEW ...
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GIGABIT ETHERNET TRANSCEIVER Figure 5. 10mm x 10mm 64 PQFP Package (S2060A) TOP VIEW March 7, 2001 / Revision H S2060 11 ...
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S2060 Figure PQFP Package (S2060B) TOP VIEW 12 GIGABIT ETHERNET TRANSCEIVER March 7, 2001 / Revision H ...
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... GIGABIT ETHERNET TRANSCEIVER Figure 7. 10mm x 10mm 64 TQFP Package (S2060C) TOP VIEW March 7, 2001 / Revision H S2060 13 ...
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S2060 Figure PQFP Package (S2060D) TOP VIEW 14 GIGABIT ETHERNET TRANSCEIVER March 7, 2001 / Revision H ...
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GIGABIT ETHERNET TRANSCEIVER Table 7. Power and Ground Application Information ...
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S2060 Figure 9. Power and Ground Connection Diagram 0.1 F 100 (+3.3 V) Vcc (+3 (+3 ferrite 100 pF 0 GIGABIT ETHERNET TRANSCEIVER V CC (+3.3 V) ...
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GIGABIT ETHERNET TRANSCEIVER Figure 10. Transmitter Timing TBC TX[0-9] SERIAL DATA OUT Table 8. S2060 Transmitter Timing ...
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S2060 Figure 12. Receiver Timing Half Rate Mode (RATEN Inactive) SERIAL DATA IN RBC1 RX[9-0] Table 9. S2060 Receiver Timing ...
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... Commercial temperature range S2060A, S2060B, S2060C. 2. Industrial temperature range S2060D. March 7, 2001 / Revision H absolute maximum rating conditions for extended periods may affect ...
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S2060 Table 12. Reference Clock Requirements ...
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GIGABIT ETHERNET TRANSCEIVER OUTPUT LOAD The S2060 serial outputs require a resistive load to set the output current. The recommended resistor value is 150 to ground. This value can be varied to adjust drive current, signal voltage swing, and power ...
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S2060 Ordering Information Applied Micro Circuits Corporation • 6290 Sequence Dr., San ...