HM62V16256CLTT-5 Renesas Electronics Corporation., HM62V16256CLTT-5 Datasheet
HM62V16256CLTT-5
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HM62V16256CLTT-5 Summary of contents
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Cautions Keep safety first in your circuit designs! 1. Renesas Technology Corporation puts the maximum effort into making semiconductor products better and more reliable, but there is always the possibility that trouble may occur with them. Trouble with semiconductors may ...
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HM62V16256C Series 4 M SRAM (256-kword Description The Hitachi HM62V16256C Series is 4-Mbit static RAM organized 262,144-word Series has realized higher density, higher performance and low power consumption by employing CMOS process technology (6-transistor memory cell). It offers low power ...
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... HM62V16256C Series Ordering Information Type No. Access time HM62V16256CLTT HM62V16256CLTT-5SL Package 400-mil 44-pin plastic TSOPII (normal-bend type) (TTP-44DB) ...
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Pin Arrangement Pin Description Pin name Function A0 to A17 Address input I/O0 to I/O15 Data input/output CS1 Chip select 1 CS2 Chip select 2 WE Write enable OE Output enable LB Lower byte select UB Upper byte select V ...
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HM62V16256C Series Block Diagram LSB A12 A11 A10 A9 A8 A13 A14 A15 A16 A17 MSB A7 I/O0 I/O15 CS2 CS1 • • • Memory matrix Row • • 2,048 x 2,048 decoder • Column ...
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Operation Table CS1 CS2 ...
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HM62V16256C Series DC Characteristics Parameter Input leakage current Output leakage current Operating current Average operating current Standby current Standby current Output high voltage ...
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Capacitance ( 1.0 MHz) Parameter Symbol Input capacitance Cin Input/output capacitance C I/O Note: 1. This parameter is sampled and not 100% tested. Min Typ Max Unit — — — — ...
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HM62V16256C Series AC Characteristics (Ta = – Test Conditions • Input pulse levels 0 0 • Input rise and fall time • Input timing ...
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Read Cycle Parameter Read cycle time Address access time Chip select access time Output enable to output valid Output hold from address change LB, UB access time Chip select to output in low-Z LB, UB enable to low-z Output enable ...
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HM62V16256C Series Write Cycle Parameter Write cycle time Address valid to end of write Chip selection to end of write Write pulse width LB, UB valid to end of write Address setup time Write recovery time Data to write time ...
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Timing Waveform Read Cycle Address CS1 CS2 LB High impedance Dout t RC Valid address ACS1 CLZ1 t ACS2 CLZ2 BLZ ...
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HM62V16256C Series Write Cycle (1) (WE Clock) Address CS1 CS2 LB Din Dout Valid address ...
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Write Cycle (2) (CS Clock Address CS1 CS2 LB Din Dout ) Valid address High impedance HM62V16256C Series 5 ...
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HM62V16256C Series Write Cycle (3) (LB, UB Clock Address CS1 CS2 LB Din Dout Valid address ...
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Low V Data Retention Characteristics (Ta = – Parameter Symbol V for data retention V CC Data retention current I CCDR I CCDR Chip deselect to data t CDR retention time Operation recovery time t R ...
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HM62V16256C Series Low V Data Retention Timing Waveform (1) (CS1 Controlled CDR 2.0 V CS1 0 V Low V Data Retention Timing Waveform (2) (CS2 Controlled CDR V CC 2.2 ...
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... Package Dimensions HM62V16256CLTT Series (TTP-44DB) 18.41 18.81 Max 44 1 0.80 *0.30 ± 0.10 0.13 0.25 ± 0.05 1.005 Max 0.10 *Dimension including the plating thickness Base material dimension 11.76 ± 0.20 Hitachi Code JEDEC JEITA Mass (reference value) HM62V16256C Series As of January, 2002 Unit: mm 0.80 0˚ – 5˚ 0.50 ± 0.10 TTP-44DB — ...
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HM62V16256C Series Cautions 1. Hitachi neither warrants nor grants licenses of any rights of Hitachi’s or any third party’s patent, copyright, trademark, or other intellectual property rights for information contained in this document. Hitachi bears no responsibility for problems that ...