AD8304ARUZ Analog Devices Inc, AD8304ARUZ Datasheet - Page 19

• Manufacturer Part Number: AD8304ARUZ
• Description: IC LOGARITHM CONV 160DB 14-TSSOP
• Manufacturer: Analog Devices Inc
• Type: Logarithmic Converterr

Specifications of AD8304ARUZ

• Design Resources: Interfacing ADL5315 to Translinear Logarithmic Amplifier (CN0056) Interfacing ADL5317 High Side Current Mirror to a Translinear Logarithmic Amplifier in an Avalanche Photodiode Power Detector
• Applications: Fiber Optics
• Mounting Type: Surface Mount
• Package / Case: 14-TSSOP
• No. Of Amplifiers: 1
• Dynamic Range, Decades: 8
• Scale Factor V / Decade: 0.204
• Supply Voltage Range: 3V To 5.5V
• Amplifier Case Style: TSSOP
• Supply Current: 4.5mA
• Input Offset Voltage: 20mV
• Number Of Channels: 1
• Number Of Elements: 2
• Power Supply Requirement: Single
• Input Resistance: 35@5VMohm
• Input Bias Current: 0.4@5VnA
• Single Supply Voltage (typ): 5V
• Dual Supply Voltage (typ): Not RequiredV
• Power Dissipation: 270mW
• Rail/rail I/o Type: Rail to Rail Output
• Single Supply Voltage (min): 3V
• Single Supply Voltage (max): 5.5V
• Dual Supply Voltage (min): Not RequiredV
• Dual Supply Voltage (max): Not RequiredV
• Operating Temp Range: -40C to 85C
• Operating Temperature Classification: Industrial
• Mounting: Surface Mount
• Pin Count: 14
• Package Type: TSSOP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant, Lead free / RoHS Compliant

Component
V
SW1, R10
R1, R2
R3, R4
R5, R6, R7, R8, R9
C1, C2, C3, C4, C9
C10
C5, C6, C7, C8, R11, Output Filtering: Allows implementation of a variety of filter config-
R12, R13, R14
R15, C11
LK1, LK2
REV. A
P
, V
N
, AGND
Figure 23. Component Side Layout
Function
Positive and Negative Supply and Ground Pins
Device Enable: When SW1 is in the “0” position, the PWDN Pin is
connected to ground and the AD8304 is in its normal operating mode.
Buffer Amplifier Gain/Slope Adjustment: The logarithmic slope
of the AD8304 can be altered using the buffer’s gain-setting resistors,
R1 and R2.
Intercept Adjustment: A dc offset can be applied to the input term-
inals of the buffer amplifier to adjust the effective logarithmic intercept.
Bias Adjustment: The voltage on the VSUM and INPT Pins can be
altered using appropriate resistor values. R9 is populated with a decoup-
ling capacitor to reduce noise pickup. The decoupling capacitor can be
removed when a fixed bias is applied to VSUM.
Supply Decoupling Capacitors
Photodiode Biaser Decoupling: Provides high frequency decoupling
of the adaptive bias output at Pin VPDB.
urations, from simple RC low-pass filters to three-pole Sallen and Key.
Input Filtering: Provides essential HF compensation at the input
Pin INPT.
Guard/Shield Options: The shells of the SMA connectors used
for the input and the photodiode bias can be set to the voltage on the
VSUM Pin or connected to ground.
Table V. Evaluation Board Configuration Options
–19–
Figure 24. Component Side Silkscreen
Default Condition
Not Applicable
SW1 = Installed
R10 = 10 kΩ (Size 0603)
R1 = Open (Size 0603)
R2 = 0 Ω (Size 0603)
R3 = Open (Size 0603)
R4 = Open (Size 0603)
R5 = R6 = Open (Size 0603)
R7 = R8 = Open (Size 0603)
R9 = 0.1 µF (Size 0603)
C1 = C4 = 0.1 µF (Size 0603)
C2 = C3 = 1 nF (Size 0603)
C9 = 10 nF (Size 0603)
C10 = 0.1 µF (Size 0603)
R11 = R13 = 0 Ω (Size 0603)
R12 = Open (Size 0603)
R14 = 0 Ω (Size 0603)
C5 = C6 = Open (Size 0603)
C7 = C8 = Open (Size 0603)
R15 = 750 Ω (Size 0603)
C11 = 1 nF (Size 0603)
LK1 = Installed
LK2 = Open
AD8304