AD8304ARUZ Analog Devices Inc, AD8304ARUZ Datasheet - Page 2

IC LOGARITHM CONV 160DB 14-TSSOP

AD8304ARUZ

Manufacturer Part Number
AD8304ARUZ
Description
IC LOGARITHM CONV 160DB 14-TSSOP
Manufacturer
Analog Devices Inc
Type
Logarithmic Converterr
Datasheet

Specifications of AD8304ARUZ

Design Resources
Interfacing ADL5315 to Translinear Logarithmic Amplifier (CN0056) Interfacing ADL5317 High Side Current Mirror to a Translinear Logarithmic Amplifier in an Avalanche Photodiode Power Detector
Applications
Fiber Optics
Mounting Type
Surface Mount
Package / Case
14-TSSOP
No. Of Amplifiers
1
Dynamic Range, Decades
8
Scale Factor V / Decade
0.204
Supply Voltage Range
3V To 5.5V
Amplifier Case Style
TSSOP
Supply Current
4.5mA
Input Offset Voltage
20mV
Number Of Channels
1
Number Of Elements
2
Power Supply Requirement
Single
Input Resistance
35@5VMohm
Input Bias Current
0.4@5VnA
Single Supply Voltage (typ)
5V
Dual Supply Voltage (typ)
Not RequiredV
Power Dissipation
270mW
Rail/rail I/o Type
Rail to Rail Output
Single Supply Voltage (min)
3V
Single Supply Voltage (max)
5.5V
Dual Supply Voltage (min)
Not RequiredV
Dual Supply Voltage (max)
Not RequiredV
Operating Temp Range
-40C to 85C
Operating Temperature Classification
Industrial
Mounting
Surface Mount
Pin Count
14
Package Type
TSSOP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Lead Free Status / RoHS Status
Lead free / RoHS Compliant, Lead free / RoHS Compliant

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AD8304–SPECIFICATIONS
Parameter
INPUT INTERFACE
PHOTODIODE BIAS
LOGARITHMIC OUTPUT
REFERENCE OUTPUT
OUTPUT BUFFER
POWER-DOWN INPUT
POWER SUPPLY
NOTES
1
2
3
4
Specifications subject to change without notice.
Minimum and maximum specified limits on parameters that are guaranteed but not tested are six sigma values.
This bias is internally arranged to track the input voltage at INPT; it is not specified relative to ground.
Output Noise and Incremental Bandwidth are functions of Input Current; see Typical Performance Characteristics.
Optional
Specified Current Range
Input Node Voltage
Temperature Drift
Input Guard Offset Voltage
Minimum Value
Transresistance
Slope
Intercept
Law Conformance Error
Maximum Output Voltage
Minimum Output Voltage
Output Resistance
Voltage WRT Ground
Output Resistance
Input Offset Voltage
Input Bias Current
Incremental Input Resistance
Output Range
Output Resistance
Wide-Band Noise
Small Signal Bandwidth
Slew Rate
Logic Level, HI State
Logic Level, LO State
Positive Supply Voltage
Quiescent Current
In Disabled State
Negative Supply Voltage
3
2
3
4
Conditions
Pin 4, INPT; Pin 3 and Pin 5, VSUM
Flows toward INPT Pin
Internally preset; may be altered
–40°C < T
V
Established between Pin 6, V
I
Pin 8, VLOG
Laser-trimmed at 25°C
0°C < T
Laser-trimmed at 25°C
0°C < T
10 nA < I
1 nA < I
Limited by V
Laser-trimmed at 25°C
Pin 7, VREF
Laser-trimmed at 25°C
–40°C < T
Pin 9, BFIN; Pin 13, BFNG; Pin 11, VOUT
Flowing out of Pin 9 or Pin 13
R
I
I
0.2 V to 4.8 V output swing
Pin 2, PWDN
–40°C < T
–40°C < T
Pin 10 and Pin 12, VPS1 and VPS2; Pin 1, VNEG
|1V
PD
PD
PD
IN
L
= 1 kΩ to ground
= 100 pA
> 1 µA (see Typical Performance Characteristics)
> 1 µA (see Typical Performance Characteristics)
– V
P
–V
SUM
A
A
PD
N
PD
< 70°C
< 70°C
| < 8V
A
A
A
A
< 1 mA, Peak Error
< +85°C, 2.7 V < V
< +85°C, 2.7 V < V
< +85°C
< +85°C
< 1 mA, Peak Error
N
= 0 V
(V
P
= 5 V, V
N
–2–
= 0 V, T
PDB
, and Pin 4
P
P
< 5.5 V
< 5.5 V
A
= 25 C, unless otherwise noted.)
Min
100
0.46
–20
70
196
194
60
35
4.95
1.98
1.92
–20
2
3.0
1
Typ
0.5
0.02
100
200
200
100
0.05
0.1
1.6
0.1
5
2
2
0.4
35
V
0.5
1
10
15
5
4.5
60
0
P
– 0.1
Max
10
0.54
+20
204
207
140
175
0.25
0.7
5.05
2.02
2.08
+20
1
5.5
5.3
–5.5
1
Unit
pA
mA
V
mV/°C
mV
mV
mV/mA
mV/dec
mV/dec
pA
pA
dB
dB
V
V
kΩ
V
V
mV
µA
MΩ
V
µV/√Hz
MHz
V/µs
V
V
V
mA
µA
V
REV. A

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