PA28F016S5-85 Intel Corporation, PA28F016S5-85 Datasheet

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PA28F016S5-85

Manufacturer Part Number
PA28F016S5-85
Description
5 VOLT FlashFile MEMORY
Manufacturer
Intel Corporation
Datasheet

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PA28F016S5-85
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The Intel
and 16-Mbit FlashFile memories provide high-density, low-cost, nonvolatile, read/write storage solutions for a
wide range of applications. Their symmetrically-blocked architecture, flexible voltage, and extended cycling
provide highly flexible components suitable for resident flash arrays, SIMMs, and memory cards. Enhanced
suspend capabilities provide an ideal solution for code or data storage applications. For secure code storage
applications, such as networking, where code is either directly executed out of flash or downloaded to DRAM,
the 4-, 8-, and 16-Mbit FlashFile memories offer three levels of protection: absolute protection with V
GND, selective hardware block locking, or flexible software block locking. These alternatives give designers
ultimate control of their code security needs.
This family of products is manufactured on Intel
industry-standard packages: the 40-lead TSOP, ideal for board-constrained applications, and the rugged
44-lead PSOP. Based on the 28F008SA architecture, the 5 Volt FlashFile memory family enables quick and
easy upgrades for designs that demand state-of-the-art technology.
NOTE: This document formerly known as Byte-Wide Smart 5 FlashFile™ Memory Family 4, 8, and 16 Mbit.
August 1999
SmartVoltage Technology
High-Performance
Enhanced Data Protection Features
Enhanced Automated Suspend Options
Industry-Standard Packaging
28F016S5 Available with Device Code
for 28F016SA
5 Volt Flash: 5 V V
12 V V
85 ns Read Access Time
Absolute Protection with V
Flexible Block Locking
Block Write Lockout during Power
Transitions
Program Suspend to Read
Block Erase Suspend to Program
Block Erase Suspend to Read
40-Lead TSOP, 44-Lead PSOP
®
5 Volt FlashFile™ memory renders a variety of density offerings in the same package. The 4-, 8-,
PP
5 VOLT FlashFile™ MEMORY
CC
28F004S5, 28F008S5, 28F016S5 (x8)
and 5 V or
PP
= GND
®
0.4
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m ETOX™ V process technology. They come in
High-Density 64-Kbyte Symmetrical
Erase Block Architecture
Extended Cycling Capability
Low Power Management
Automated Program and Block Erase
SRAM-Compatible Write Interface
ETOX™ V Nonvolatile Flash
Technology
4 Mbit: Eight Blocks
8 Mbit: Sixteen Blocks
16 Mbit: Thirty-Two Blocks
100,000 Block Erase Cycles
Deep Power-Down Mode
Automatic Power Savings Mode
Decreases I
Command User Interface
Status Register
CC
in Static Mode
PRELIMINARY
Order Number: 290597-006
PP
at

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PA28F016S5-85 Summary of contents

Page 1

VOLT FlashFile™ MEMORY 28F004S5, 28F008S5, 28F016S5 (x8) n SmartVoltage Technology 5 Volt Flash and High-Performance 85 ns Read Access Time n Enhanced Data Protection Features Absolute Protection ...

Page 2

... Copies of documents which have an ordering number and are referenced in this document, or other Intel literature, may be obtained from: Intel Corporation P.O. Box5937 Denver, CO 80217-9808 or call 1-800-548-4725 or visit Intel’s Website at http://\www.intel.com COPYRIGHT © INTEL CORPORATION 1997, 1998, 1999 Other brands and names are the property of their respective owners * CG-041493 ...

Page 3

INTRODUCTION..............................................5 8.1 New Features.............................................5 8.2 Product Overview .......................................5 8.3 Pinout and Pin Description .........................6 8.4 PRINCIPLES OF OPERATION ...................10 8.5 Data Protection ........................................10 8.6 BUS OPERATION .......................................10 8.7 Read ........................................................10 8.8 Output Disable .........................................10 8.9 Standby....................................................10 8.10 Deep Power-Down ...

Page 4

REVISION HISTORY Number -001 Original version -002 Table 3 revised to reflect change in abbreviations from “W” for write to “P” for program. Ordering information graphic (Section 7.0) corrected: from PB = Ext. Temp. 44-Lead PSOP to ...

Page 5

INTRODUCTION This datasheet contains 4-, 8-, and 16-Mbit 5 Volt FlashFile memory specifications. Section provides a flash memory overview. Sections 2.0, through 5.0 describe the memory organization and functionality. Section 6.0 covers specifications for commercial and temperature product offerings. ...

Page 6

To protect programmed data, each block can be locked. This block locking mechanism uses a combination of bits, block lock-bits and a master lock-bit, to lock and unlock individual blocks. The block lock-bits gate block erase and ...

Page 7

Table 1. Pin Descriptions Sym Type A –A INPUT ADDRESS INPUTS: Inputs for addresses during read and write operations Addresses are internally latched during a write cycle Mbit A DQ –DQ INPUT/ DATA INPUT/OUTPUTS: Inputs ...

Page 8

...

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PRINCIPLES OF OPERATION The 5 Volt FlashFile memories include an on-chip WSM to manage block erase, program, and lock-bit configuration functions. It allows for: 100% TTL- level control inputs, fixed power supplies during block erasure, program, and lock-bit configuration, ...

Page 10

Data Protection Depending on the application, the system designer may choose to make the V power supply PP switchable (available only when memory block erases, programs, or lock-bit configurations are required) or hardwired ...

Page 11

Block 31 Reserved for Future Implementation 1F0002 Block 31 Lock Configuration Reserved for Future Implementation 1F0000 (Blocks 16 through 30) 0FFFFF Block 15 Reserved for Future Implementation Block 15 Lock Configuration 0F0002 Reserved for Future Implementation 0F0000 (Blocks 8 ...

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Table 2. Bus Operations Mode Notes RP# Read 1,2 Output Disable Standby Deep Power-Down Read Identifier Codes ...

Page 13

Table 3. Command Definitions Bus Cycles Command Req’d. Read Array/Reset 1 Read Identifier Codes 2 Read Status Register 2 Clear Status Register 1 Block Erase 2 Program 2 Block Erase and Program 1 Suspend Block Erase and Program 1 Resume ...

Page 14

Read Array Command Upon initial device power-up and after exit from deep power-down mode, the device defaults to read array mode. This operation is also initiated by writing the Read Array command. The device remains enabled ...

Page 15

Block preconditioning, erase, and verify are handled internally by the WSM (invisible to the system). After the two-cycle block erase sequence is written, the device automatically outputs status register data when read (see Figure 6). The CPU can detect block ...

Page 16

V level used for block erase) while PP block erase is suspended. RP# must also remain (the same RP# level used for block IH HH erase). Block erase cannot resume until ...

Page 17

Clear block lock-bits operation is initiated using a two-cycle command sequence. A clear block lock-bits setup is written first. Then, the device automatically outputs status register data when read (see Figure 11). The CPU can detect completion of the clear ...

Page 18

Table 6. Status Register Definition WSMS ESS ECLBS SR.7 = WRITE STATE MACHINE STATUS 1 = Ready 0 = Busy SR.6 = ERASE SUSPEND STATUS 1 = Block Erase Suspended 0 = Block Erase ...

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Start Write 20H, Block Address Write D0H, Block Address Read Status Register Suspend Block Erase Loop No 0 Suspend SR.7 = Block Erase Yes 1 Full Status Check if Desired Block Erase Complete FULL STATUS CHECK PROCEDURE Read Status Register ...

Page 20

Start Write 40H, Address Write Byte Data and Address Read Status Register Suspend Program Loop No 0 Suspend SR.7 = Program 1 Full Status Check if Desired Program Complete FULL STATUS CHECK PROCEDURE Read Status Register Data ...

Page 21

Start Write B0H Read Status Register 0 SR SR.6 = Block Erase Completed 1 Read Program Read or Program ? Program Read Array No Loop Data Done? Yes Write D0H Write FFH Block Erase Resumed Read Array ...

Page 22

Start Write B0H Read Status Register 0 SR Program Completed SR Write FFH Read Array Data No Done Reading Yes Write D0H Write FFH Program Resumed Read Array Data Figure 9. Program ...

Page 23

Start Write 60H, Block/Device Address Write 01H/F1H, Block/Device Address Read Status Register 0 SR Full Status Check if Desired Set Lock-Bit Complete FULL STATUS CHECK PROCEDURE Read Status Register Data (See Above Range Error ...

Page 24

Start Write 60H Write D0H Read Status Register 0 SR Full Status Check if Desired Clear Block Lock-Bits Complete FULL STATUS CHECK PROCEDURE Read Status Register Data (See Above Range Error ...

Page 25

DESIGN CONSIDERATIONS 5.1 Three-Line Output Control Intel provides three control inputs to accommodate multiple memory connections: CE#, OE#, and RP#. Three-line control provides for: a. Lowest possible memory power dissipation. b. Data bus contention avoidance. To use these control ...

Page 26

ELECTRICAL SPECIFICATIONS 6.1 Absolute Maximum Ratings* Temperature under Bias .............. –10 °C to +80 °C Storage Temperature................. –65 °C to +125 °C Voltage On Any Pin (except V and RP#) ......... –2 +7.0 V ...

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DC Characteristics— Commercial Temperature Sym Parameter Notes I Input Load Current Output Leakage Current Standby Current 1,3,6 CCS Deep Power-Down 1 CCD CC Current I V Read Current 1,5,6 ...

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DC Characteristics— Commercial Temperature Sym Parameter Notes V Input Low Voltage Input High Voltage Output Low Voltage 3 Output High Voltage 3,7 OH1 (TTL) V Output High Voltage ...

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INPUT 1.5 0.0 AC test inputs are driven at 3.0 V for a Logic "1" and 0.0 V for a Logic "0." Input timing begins, and output timing ends, at 1.5 V. Input rise and fall times (10% to ...

Page 30

V IH RY/BY# ( RP# ( Figure 15. AC Waveform for Reset Operation Table 7. Reset Specifications # Sym P1 t RP# Pulse Low Time PLPH (If RP# is tied ...

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AC Characteristics— Read-Only Operations °C to +70 °C A Versions (4) # Sym Parameter R1 t Read Cycle Time 4, 8 Mbit AVAV 16 Mbit R2 t Address to Output 4, 8 Mbit AVQV 16 Mbit ...

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Standby V IH ADDRESSES ( CE# ( OE# ( WE# ( DATA (D/Q) High Z (DQ0-DQ7 ...

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AC Characteristics— Write Operations °C to +70 °C A Versions (4) # Sym RP# High Recovery to WE# (CE#) Going Low PHWL PHEL CE# (WE#) Setup to WE# ...

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ADDRESSES [ CE# (WE#) [E(W OE# [ WE# (CE#) [W(E ...

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Block Erase, Program, and Lock-Bit Configuration Performance Commercial Temperature ± 0 ± 0. °C to +70 ° Sym Parameter W16 t Program Time WHRH1 t ...

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Extended Temperature Operating Conditions Except for the specifications given in this section, all DC and AC characteristics are identical to those given in commercial temperature specifications. See the Section 6.2 for commercial temperature specifications. Extended Temperature ...

Page 37

... Voltage Options ( Volt Flash Product Family S = FlashFile™ Memory Valid Operational 10 Mbit 100 pF load E28F016S5-85 –90/–100 E28F016S5-120 –120 E28F016S5 (2) –120 PA28F016S5-85 –90/–100 PA28F016S5-120 –120 Extended Temperature TE28F016S5-110 –100/–110 TB28F016S5-110 –100/–110 / V/5 V and 12 V) Combinations ...

Page 38

ADDITIONAL INFORMATION Order Number 290598 3 Volt FlashFile™ Memory; 28F004S3, 28F008S3, 28F016S3 datasheet AP-374 Flash Memory Write Protection Techniques 292123 297796 5 Volt FlashFile™ Memory/28F004S5, 28F008S5, 28F016S5 Specification Update Note 3 AP-625 28F008SC Compatibility with 28F008SA ...

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