CY37128P84-125YMB Cypress Semiconductor Corporation., CY37128P84-125YMB Datasheet

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CY37128P84-125YMB

Manufacturer Part Number
CY37128P84-125YMB
Description
UltraLogic 128-Macrocell ISR CPLD
Manufacturer
Cypress Semiconductor Corporation.
Datasheet

Specifications of CY37128P84-125YMB

Case
PLCC-84L
Features
Selection Guide
Maximum Propagation Delay, t
Minimum Set-Up, t
Maximum Clock to Output, t
Typical Supply Current, I
• 128 macrocells in eight logic blocks
• In-System Reprogrammable (ISR™)
• Up to 128 I/Os
• High speed
Cypress Semiconductor Corporation
Logic Block Diagram (160-pin TQFP)
— JTAG-compliant on-board programming
— Design changes don’t cause pinout changes
— Design changes don’t cause timing changes
— plus 5 dedicated inputs including 4 clock inputs
— f
— t
— t
MAX
PD
S
TDI
TCLK
TMS
= 3.5 ns
= 6.5 ns
= 167 MHz
I/O
I/O
I/O
I/O
16
32
28
JTAG Tap
Controller
0
S
–I/O
–I/O
–I/O
–I/O
(ns)
15
31
47
63
CC
16 I/Os
16 I/Os
16 I/Os
16 I/Os
(mA) in Low Power Mode
CO
PD
(ns)
TDO
(ns)
BLOCK
BLOCK
BLOCK
BLOCK
LOGIC
LOGIC
LOGIC
LOGIC
4
C
D
64
A
B
MACROCELL
UltraLogic™ 128-Macrocell ISR™ CPLD
3901 North First Street
PRELIMINARY
INPUT
36
16
36
16
36
16
36
16
INPUTS
1
PIM
CY37128-167
INPUTS
• Product-term clocking
• IEEE 1149.1 JTAG boundary scan
• Programmable slew rate control on individual I/Os
• Low power option on individual logic block basis
• 5V and 3.3V I/O capability
• User-Programmable Bus Hold capabilities on all I/Os
• Simple Timing Model
• PCI compliant
• 84-160 pins in TQFP, PLCC and CLCC packages
• Pinout compatible with the CY37064/37064V, CY37128V,
CLOCK
6.5
CY37192/37192V, CY37256/37256V, CY7C373i,
CY7C374i, CY7C375i
30
— t
4
4
4
36
16
36
16
36
16
36
16
CO
INPUT/CLOCK
MACROCELLS
= 4.5 ns
BLOCK
BLOCK
BLOCK
LOGIC
BLOCK
LOGIC
LOGIC
LOGIC
San Jose
64
H
G
E
F
4
CY37128-125
5.5
6.5
10
30
16 I/Os
16 I/Os
16 I/Os
16 I/Os
CA95134
I/O
I/O
I/O
I/O
112
96
80
64
–I/O
–I/O
–I/O
–I/O
CY37128-100
• 408-943-2600
January 6, 1999
CY37128
37128–1
111
95
79
127
7.0
6.5
12
30

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CY37128P84-125YMB Summary of contents

Page 1

Features • 128 macrocells in eight logic blocks • In-System Reprogrammable (ISR™) — JTAG-compliant on-board programming — Design changes don’t cause pinout changes — Design changes don’t cause timing changes • 128 I/Os — plus 5 dedicated inputs ...

Page 2

Functional Description The CY37128 is an In-System Reprogrammable (ISR) Com- plex Programmable Logic Device (CPLD) and is part of the Ultra37000™ family of high-density, high-speed CPLDs. Like all members of the Ultra37000 family, the CY37128 is de- signed to bring ...

Page 3

Pin Configurations I/O /TCLK 10 15 I I CLK / VCCO 21 GND 22 CLK /I ...

Page 4

Pin Configurations (continued) 100 TCLK 1 GND CLK / ...

Page 5

Pin Configurations (continued) GND I I/O /TCLK I GND I/O ...

Page 6

Maximum Ratings (Above which the useful life may be impaired. For user guide- lines, not tested.) Storage Temperature ................................. – +150 C Ambient Temperature with Power Applied ............................................. – +125 C Supply Voltage to Ground Potential ...

Page 7

Electrical Characteristics Over the Operating Range Parameter Description V Output HIGH Voltage OH V Output HIGH Voltage with Out- OHZ [7] put Disabled V Output LOW Voltage OL V Input HIGH Voltage IH V Input LOW Voltage IL I Input ...

Page 8

AC Test Loads and Waveforms 238 (COM'L) 319 (MIL) 5V OUTPUT 170 (COM' 236 (MIL) INCLUDING JIG AND SCOPE (a) 37128-6 Equivalent to: THÉVENIN EQUIVALENT 99 (COM'L) 136 (MIL) 2.08V(COM'L) OUTPUT 2.13V(MIL [8] Parameter ...

Page 9

Switching Characteristics Over the Operating Range Parameter Description Combinatorial Mode Parameters [10, 11, 12] t Input to Combinatorial Output PD [10, 11, 12] t Input to Output Through Transparent Input or PDL Output Latch [10, 11, 12] t Input to ...

Page 10

Switching Characteristics Over the Operating Range Parameter Description t Buried Register Used as an Input Register or Latch IHPT Data Hold Time [10, 11, 12] t Product Term Clock or Latch Enable (PTCLK) to CO2PT Output Delay (Through Logic Array) ...

Page 11

Typical I Characteristics The typical pattern is a 16-bit up counter, per logic block, with ...

Page 12

Switching Waveforms Combinatorial Output INPUT COMBINATORIAL OUTPUT Registered Output with Synchronous Clocking INPUT SYNCHRONOUS CLOCK REGISTERED OUTPUT REGISTERED OUTPUT SYNCHRONOUS CLOCK Registered Output with Product Term Clocking Input Going Through the Array INPUT PRODUCT TERM CLOCK REGISTERED OUTPUT PRODUCT TERM ...

Page 13

Switching Waveforms (continued) Registered Output with Product Term Clocking Input Coming From Adjacent Buried Register INPUT PRODUCT TERM CLOCK REGISTERED OUTPUT PRODUCT TERM CLOCK Latched Output INPUT LATCH ENABLE LATCHED OUTPUT Registered Input REGISTERED INPUT INPUT REGISTER CLOCK COMBINATORIAL OUTPUT ...

Page 14

Switching Waveforms (continued) Clock to Clock INPUT REGISTER CLOCK OUTPUT REGISTER CLOCK Latched Input LATCHED INPUT LATCH ENABLE COMBINATORIAL OUTPUT LATCH ENABLE Latched Input and Output LATCHED INPUT LATCHED OUTPUT INPUT LATCH ENABLE OUTPUT LATCH ENABLE LATCH ENABLE PRELIMINARY t ...

Page 15

Switching Waveforms (continued) Asynchronous Reset INPUT REGISTERED OUTPUT CLOCK Asynchronous Preset INPUT REGISTERED OUTPUT CLOCK Output Enable/Disable INPUT OUTPUTS PRELIMINARY CY37128 t RR 37128- 37128- ...

Page 16

... CY37128P84–125JI CY37128P100–125AI CY37128P160–125AI CY37128P84–125YMB 100 CY37128P84–100JC CY37128P100–100AC CY37128P160–100AC CY37128P84–100JI CY37128P100–100AI CY37128P160–100AI CY37128P84–100YMB In-System Reprogrammable, ISR, UltraLogic, F Cypress Semiconductor Corporation. Warp2 and Warp3 are registered trademarks of Cypress Semiconductor Corporation. Document #: 38 00558–C ...

Page 17

Package Diagrams 100-Pin Thin Plastic Quad Flat Pack (TQFP) A100 PRELIMINARY 17 CY37128 51-85048-A ...

Page 18

Package Diagrams (continued) 160-Pin Thin Plastic Quad Flat Pack (TQFP) A160 PRELIMINARY 84-Lead Plastic Leaded Chip Carrier J83 18 CY37128 51-85049-A 51-85006-A ...

Page 19

Package Diagrams (continued) © Cypress Semiconductor Corporation, 1999. The information contained herein is subject to change without notice. Cypress Semiconductor Corporation assumes no responsibility for the use of any circuitry other than circuitry embodied in a Cypress Semiconductor product. Nor ...

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