S-93C56ADFJ-TB Seiko, S-93C56ADFJ-TB Datasheet

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S-93C56ADFJ-TB

Manufacturer Part Number
S-93C56ADFJ-TB
Description
CMOS SERIAL E 2 PROM
Manufacturer
Seiko
Datasheet

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T
T
T
Rev. 2.2
O Low power consumption
O Wide operating voltage range
O Sequential read capable
CMOS SERIAL E
DO
CS
SK
DI
Features
Pin Assignment
Pin Functions
Standby
Operating : 0.8 mA Max. (VCC=5.5 V)
Read/Write : 1.8 to 5.5 V
* See
1
2
3
4
S-93C46ADP-1A
S-93C56ADP-1A
S-93C66ADP-1A
8-pin DIP
Top view
T
Dimensions
: 1.0 A Max. (VCC=5.5 V)
: 0.4 mA Max. (VCC=2.5 V)
Name
CS
SK
DI
DO
GND
NC
V
TEST
CC
8
7
6
5
2
PROM
GND
V
TEST
NC
DIP
CC
1
2
3
4
5
6
7
8
NC
V
SK
CS
CC
SOP1
The S-93C46A/56A/66A is high speed, low power 1K/2K/4K-bit E
with a wide operating voltage range. It is organized as 64-word 16-bit, 128-
word 16-bit, 256-word 16-bit, respectivly.
read, at which time addresses are automatically incremented in 16-bit
blocks. The instruction code is compatible with the NM93CS46/56/66.
3
4
5
6
7
8
1
2
8-pin SOP1
S-93C46AFJ
S-93C56AFJ
S-93C66AFJ
Top view
Pin Number
1
2
3
4
SOP2
1
2
3
4
5
6
7
8
Seiko Instruments Inc.
8
7
6
5
TSSOP MSOP
TEST
GND
DO
DI
1
2
3
4
5
6
7
8
Figure 1
Table 1
O Endurance : 10
O Data retention : 10 years
O S-93C46A : 1K bits NM93CS46 instruction code compatible
O S-93C56A : 2K bits NM93CS56 instruction code compatible
O S-93C66A : 4K bits NM93CS66 instruction code compatible
SK
CS
DI
DO
8
7
6
5
4
3
2
1
S-93C46ADFJ
S-93C56ADFJ
S-93C66ADFJ
8-pin SOP2
Chip select input
Serial clock input
Serial data input
Serial data output
Ground
Test pin (normally kept open)
(can be connected to GND or Vcc)
No Connection
Power supply
Top view
1
2
3
4
6
cycles/word
S-93C46A / 56A / 66A
8
7
6
5
Function
TEST
V
NC
GND
CC
Each is capable of sequential
CS
SK
DI
DO
TEST
GND
V
NC
CC
1
2
3
4
S-93C46AMFN
S-93C56AMFN
S-93C66AMFN
8-pin TSSOP
8-pin MSOP
S-93C46AFT
S-93C56AFT
S-93C66AFT
1
2
3
4
Top view
Top view
8
7
6
5
8
7
6
5
CS
SK
DI
DO
2
PROM
V
NC
TEST
GND
CC
1

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S-93C56ADFJ-TB Summary of contents

Page 1

... The S-93C46A/56A/66A is high speed, low power 1K/2K/4K-bit E with a wide operating voltage range organized as 64-word 16-bit, 128- word 16-bit, 256-word 16-bit, respectivly. read, at which time addresses are automatically incremented in 16-bit blocks. The instruction code is compatible with the NM93CS46/56/66. O Endurance : 10 ...

Page 2

... WRAL (Write all)*2 ERAL (Erase all)*2 EWEN (Program enable) EWDS (Program disable Doesn’t matter Addresses are continuously incremented Valid only at Vcc = 2 5 Absolute Maximum Ratings Power supply voltage Input voltage Output voltage Storage temperature under bias Storage temperature 2 Address ...

Page 3

... V =2 =1 opr Table 5 Symbol Conditions Min OUT OUT Table 6 Symbol Min. Typ Seiko Instruments Inc. CMOS SERIAL E S-93C46A/56A/66A Min. Typ. Max. Unit 1.8 5.5 V 2.5 5.5 V 2.0 Vcc V Vcc V Vcc V 0.0 0.8 V 0.0 0.2 Vcc V 0.0 0.15 Vcc V -40 +85 ° ...

Page 4

... I =2 =100 A voltage OL I =-400 A OH High level output =-100 A voltage Write enable latch Only when write disable V DH data hold voltage mode 4 7 Table Min. Typ. Max. Min. 0.8 2.0 8 Table Conditions Min ...

Page 5

... Input pulse voltage Output reference voltage Output load Parameter CS setup time CS hold time CS deselect time Data setup time Data hold time Output delay Clock frequency Clock pulse width Output disable time Output enable time Programming time t CSS Valid data ...

Page 6

... SK after CS goes high. A start-bit can only be recognized when the high latched to the rising edge of SK when CS goes from low to high impossible for recognized as long low, even if there are SK pulses after CS goes high. Any SK pulses input while DI is low are called "dummy clocks." Dummy clocks can be used to adjust the number of clock cycles needed by the serial IC to match those sent out by the CPU ...

Page 7

... VERIFY the completion of the write operation in order to minimize the write cycle by setting CS to high and checking the DO pin, which is low during the write operation and high after its completion. This VERIFY procedure can be executed over and over again. ...

Page 8

... After changing CS to high, input a start-bit, op-code (WRITE), address, and 16-bit data. If there is a data overflow of more than 16 bits, only the last 16 bits of the data is considered valid. Changing CS to low will start the WRITE operation not necessary to make the data "1" before initiating the WRITE operation. ...

Page 9

... ERASE This command erases 16-bit data in a specified address. After changing CS to high, input a start-bit, op-code (ERASE), and address not necessary to input data. Changing CS to low will start the ERASE operation, which changes every bit of the 16-bit data to "1." ...

Page 10

... After changing CS to high, input a start-bit, op-code (WRAL), address (optional), and 16-bit data. If there is a data overflow of more than 16 bits, only the last 16 bits of the data is considered valid. Changing CS to low will start the WRAL operation not necessary to make the data "1" before initiating the WRAL operation. ...

Page 11

... ERAL This instruction erases the data in every address. After changing CS to high, input a start-bit, op-code (ERAL), and address (optional not necessary to input data. Changing CS to low will start the ERAL operation, which changes every bit of data to "1." ...

Page 12

... ERAL instructions. The EWDS instruction puts the S-93C46A/56A/66A into write disable mode, which refuses WRITE, ERASE, WRAL, and ERAL instructions. The S-93C46A/56A/66A powers on in write disable mode, which protects data against unexpected, erroneous write operations caused by noise and/or CPU malfunctions. It should be kept in write disable mode except when performing write operations. CS ...

Page 13

... DI and DO. However, since there is a possibility that the DO output from the serial memory IC will interfere with the data output from the CPU with a 3-wire interface, install a resistor between DI and DO in order to give preference to data output from the CPU to DI (See Figure 22). ...

Page 14

... Package code Product name Product name Package code S-93C46A S-93C56A S-93C66A Note 1) Package dimensions of SOPs whose package codes are FJ and DFJ are the same in the range of deviation. 2) Please contact an SII local office or a local representative for details. 14 None None (for DIP) ...

Page 15

... Current consumption (READ) I CC1 Power supply voltage V CC Ta=25 °C f =100 KHz, 10 KHz SK DATA=0101 0.4 I CC1 (mA) 100KHz 0.2 10KHz (V) CC 1.7 Current consumption (WRITE) I Ambient temperature 1.0 I CC2 (mA) 0 (°C) 1.2 Current consumption (READ) I — Ambient temperature Ta 0.4 I CC1 (mA) ...

Page 16

... Ta (°C) 1.15 Output leakage current I — LO Ambient temperature DO=5 0 (°C) 16 — 1.10 Current consumption (WRITE) I CC2 Power supply voltage V 1.0 I CC2 (mA) 0.5 0 — 1.12 Input leakage current I SB Ambient temperature Ta 1 0.5 0 1.14 Output leakage current I Ambient temperature Ta 1 ...

Page 17

... High level output current I Ambient temperature -20 (mA) -10 (°C) 1.24 High level output current I Ambient temperature (mA - (°C) Seiko Instruments Inc. 2 CMOS SERIAL E PROM S-93C46A/56A/66A — — — — ...

Page 18

... Ta (°C) 18 1.26 Low level output current I Ambient temperature (mA - (°C) 1.28 Input voltage Power supply voltage V Ta=25°C CS, SK, DI 3.0 V INV (V) 1 Seiko Instruments Inc. — — (V) ...

Page 19

... Ta (°C) 2.7 Data output delay time t — PD Ambient temperature 0.4 0.2 - (°C) 2.2 Program time t — PR Power supply voltage V Ta=25° (ms (V) CC 2.4 Program time t — PR Ambient temperature (ms - (° ...

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... Use of the information described herein for other purposes and/or reproduction or copying without the express permission of Seiko Instruments Inc. is strictly prohibited. The products described herein cannot be used as part of any device or equipment affecting the human body, such as exercise equipment, medical equipment, security systems, gas equipment, or any apparatus installed in airplanes and other vehicles, without prior written permission of Seiko Instruments Inc ...

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