S-80937CLNB-G67-T2 Seiko, S-80937CLNB-G67-T2 Datasheet
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S-80937CLNB-G67-T2
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S-80937CLNB-G67-T2 Summary of contents
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... Detection voltage • Output forms Applications • Power supply monitor for portable equipment such as notebook PCs, digital still cameras, PDAs and cellular phones • Constant voltage power monitor for cameras, video equipment and communication equipment • Power monitor and reset for CPUs and microcomputers ...
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... ULTRA-SMALL PACKAGE BUILT-IN DELAY CIRCUIT HIGH PRECISION VOLTAGE DETECTOR S-809xxC Series Block Diagrams 1. Nch Open-drain Output Products VDD VSS *1. Parasitic diode 2. CMOS Output Products VDD VSS *1. Parasitic diode 2 + Delay *1 circuit − V REF CD Figure Delay − circuit V REF CD Figure 2 Seiko Instruments Inc. ...
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... Product Name Structure The detection voltage, output form and packages for S-809xxC Series can be selected at the user's request. Refer to the "1. Product Name" for the construction of the product name and "2. Product Name List" for the full product names. 1. Product Name 1-1. SC-82AB, SOT-23-5 packages S − ...
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... ULTRA-SMALL PACKAGE BUILT-IN DELAY CIRCUIT HIGH PRECISION VOLTAGE DETECTOR S-809xxC Series 2. Product Name List 2-1. Nch Open-drain Output Products Detection voltage range Hysteresis width (Typ.) 1.3 V ±2.0 % 0.065 V 1.4 V ±2.0 % 0.070 V 1.5 V ±2.0 % 0.075 V 1.6 V ±2.0 % 0.080 V 1.7 V ±2.0 % 0.085 V 1.8 V ±2.0 % 0.090 V 1.9 V ± ...
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... S-80930CLMC-G60-T2 S-80930CLPF-G60TFG S-80931CLNB-G61-T2 S-80931CLMC-G61-T2 S-80931CLPF-G61TFG S-80932CLNB-G62-T2 S-80932CLMC-G62-T2 S-80932CLPF-G62TFG S-80933CLNB-G63-T2 S-80933CLMC-G63-T2 S-80933CLPF-G63TFG S-80934CLNB-G64-T2 S-80934CLMC-G64-T2 S-80934CLPF-G64TFG S-80935CLNB-G65-T2 S-80935CLMC-G65-T2 S-80935CLPF-G65TFG S-80936CLNB-G66-T2 S-80936CLMC-G66-T2 S-80936CLPF-G66TFG S-80937CLNB-G67-T2 S-80937CLMC-G67-T2 S-80937CLPF-G67TFG S-80938CLNB-G68-T2 S-80938CLMC-G68-T2 S-80938CLPF-G68TFG S-80939CLNB-G69-T2 S-80939CLMC-G69-T2 S-80939CLPF-G69TFG S-80940CLNB-G7A-T2 S-80940CLMC-G7A-T2 S-80940CLPF-G7ATFG S-80941CLNB-G7B-T2 S-80941CLMC-G7B-T2 S-80941CLPF-G7BTFG S-80942CLNB-G7C-T2 S-80942CLMC-G7C-T2 S-80942CLPF-G7CTFG S-80943CLNB-G7D-T2 S-80943CLMC-G7D-T2 S-80943CLPF-G7DTFG S-80944CLNB-G7E-T2 ...
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... CD 4 OUT Pin No. Pin name 1 OUT 2 VDD 3 VSS * *1. The NC pin is electrically open. The NC pin can be connected to VDD or VSS. Pin No. Pin name 1 VSS 2 OUT VDD Seiko Instruments Inc. Rev.2.1 Table 3 Pin description GND pin Voltage input pin Connection pin for delay capacitor ...
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... CMOS output products Output current Power dissipation Operating ambient temperature Storage temperature Caution The absolute maximum ratings are rated values exceeding which the product could suffer physical damage. These values must therefore not be exceeded under any conditions. Table 6 Symbol Absolute maximum ratings − ...
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... Delay time t D ∆ − V Detection voltage *2 temperature coefficient ∆ Ta • − *1. −V : Actual detection voltage, DET Table 1.) *2. The temperature change ratio in the detection voltage [mV/°C] is calculated by using the following equation. ∆ − DET *1 ° = − mV Typ. DET ∆ ...
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... D ∆ − V Detection voltage DET *2 temperature coefficient ∆ • − Ta *1. −V : Actual detection voltage, DET Table 2.) *2. The temperature change ratio in the detection voltage [mV/°C] is calculated by using the following equation. ∆ − DET *1 mV/ ° − V Typ. DET ∆ ...
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... ULTRA-SMALL PACKAGE BUILT-IN DELAY CIRCUIT HIGH PRECISION VOLTAGE DETECTOR S-809xxC Series Test Circuits 1. VDD V DD S-809xxC V Series VSS * unnecessary for CMOS output products. Figure 6 3. VDD V DD S-809xxC V Series VSS Figure 8 5. VDD V DD S-809xxC V Series VSS Figure 100 kΩ ...
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... D Figure Release voltage (+V Detection voltage (−V Minimum operating voltage V SS Output from the OUT pin less than minimum operating voltage, values of OUT pin output is free of the Figure 12 Seiko Instruments Inc. S-809xxC Series ) DET ) DET VDD CD OUT VSS V ) DET ...
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... OFF and the Pch transistor provide V Figure 13 is OFF, the comparator input voltage is goes below +V 1-2. When the V DD the detection voltage −V becomes ON, the Pch transistor becomes OFF, and the V the Nch transistor N1 in Figure 14 becomes ON, the comparator input voltage is changed to • ...
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... DET Nch open-drain output products: Min. 4.3, CMOS output products: Caution 1. When the CD pin is open, a double pulse shown in Figure 15 may appear at release. To avoid the double pulse, attach larger capacitor to the CD pin. Do not apply voltage to the CD pin. 2. Print circuit board layout should be made in such a way that no current flows into or flows from the CD pin since the impedance of the CD pin is high, otherwise correct delay time cannot be provided ...
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... V V DET DET = × ∆ − DET The temperature coefficients for the release voltage and the detection voltage have the same sign consequently. 3-3. Temperature Characteristics of Hysteresis Voltage The temperature characteristics for the hysteresis voltage is expressed as calculated as follows: ∆ + ∆ − − ...
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... Figure 17 ), Release Voltage (+ + + + V ) DET ) is a voltage at which the output turns to low. This detection voltage varies ) Max. is called the detection voltage range (Refer to Figure DET ) is a voltage at which the output turns to high. This release voltage varies ) Max. is called the release voltage range (Refer to Figure 19). ...
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... Delay Time ( Delay time is a time internally measured from the instant at which input voltage to the VDD pin exceeds the release voltage (+ the point at which the output of the OUT pin inverts. The delay time changes DET according to the external capacitor (C 4 ...
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... SII shall not bear any responsibility for the patents on the circuits described herein. • SII claims no responsibility for any and all disputes arising out connection with any infringement of the products including this IC upon patents owned by a third party. ...
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... ULTRA-SMALL PACKAGE BUILT-IN DELAY CIRCUIT HIGH PRECISION VOLTAGE DETECTOR S-809xxC Series Typical Characteristics (Typical Data) 1. Detection Voltage (V DET S-80913CN 1.50 1.45 +V DET 1.40 1.35 1.30 -V 1.25 1.20 -40 - (°C) S-80915CN 1.60 1.55 +V DET 1.50 1.45 -V 1.40 -40 - (°C) 2. Hysteresis Voltage Width (V S-80913CN -40 - (°C) S-80915CN ...
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... ULTRA-SMALL PACKAGE BUILT-IN DELAY CIRCUIT HIGH-PRECISION VOLTAGE DETECTOR Rev.2.1 _00 3. Current Consumption (I SS S-80913CL 3.0 16 µA 2.5 2.0 1.5 1.0 0.5 0 (V) DD S-80915CL 3.0 3.4 µA 2.5 2.0 1.5 1.0 0 Current Consumption (I SS S-80913CN 2.0 1.5 1.0 0.5 0.0 -40 - (°C) S-80915CN 2.0 1.5 1.0 0.5 0.0 -40 - (° Input Voltage ( S-80914CL Ta=25°C 3.0 2.5 2.0 1.5 1.0 0.5 0 ...
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... ULTRA-SMALL PACKAGE BUILT-IN DELAY CIRCUIT HIGH PRECISION VOLTAGE DETECTOR S-809xxC Series 5. Nch Transistor Output Current (I S-80960CL/ =1. Nch Transistor Output Current (I S-80914CL/CN 3.5 Ta=-40°C 3.0 2.5 25°C 2.0 1.5 1.0 0.5 0 Pch Transistor Output Current (I S-80913CL 3.0 2.5 2.0 1.5 1.0 0.5 0.0 0 0.5 1 1.5 V ...
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... ULTRA-SMALL PACKAGE BUILT-IN DELAY CIRCUIT HIGH-PRECISION VOLTAGE DETECTOR Rev.2.1 _00 10. Dynamic Response - C OUT S-80913CL 1 tpHL 0.1 0.01 tpLH 0.001 0.00001 0.0001 0.001 Load capacitance ( µ F) S-80914CL 1 0.1 tpHL 0.01 0.001 0.00001 0.0001 0.001 Load capacitance ( µ F) S-80915CL 1 tpHL 0.1 0.01 tpLH 0.001 0.00001 0.0001 0.001 Load capacitance ( µ F) ...
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... V DD = =0 Figure 22 Measurement Condition for Response Time Caution The above connection diagram and constant will not guarantees successful operation. Perform through evaluation using the actual application to set the constant. 11. Delay Time - CD Pin Capacitance(C S-80913CN 1000 100 10 1 0.1 0.01 ...
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... Reset circuits protect microcomputers in the event of current being momentarily switched off or lowered. Reset circuits shown in Figures can be easily constructed with the help of the S-809xxC Series that has a low operating voltage, a high-precision detection voltage, hysteresis and the reset circuits. ...
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... ULTRA-SMALL PACKAGE BUILT-IN DELAY CIRCUIT HIGH PRECISION VOLTAGE DETECTOR S-809xxC Series 2. Change of Detection Voltage In Nch open-drain output products of the S-809xxC Series, detection voltage can be changed using resistance dividers or diodes as shown in Figures 28 to 29. In Figure 28, hysteresis width also changes. VDD * (RA≤ ...
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... Use of the information described herein for other purposes and/or reproduction or copying without the express permission of Seiko Instruments Inc. is strictly prohibited. The products described herein cannot be used as part of any device or equipment affecting the human body, such as exercise equipment, medical equipment, security systems, gas equipment, or any apparatus installed in airplanes and other vehicles, without prior written permission of Seiko Instruments Inc ...