AM29F400AB-120EC Meet Spansion Inc., AM29F400AB-120EC Datasheet
AM29F400AB-120EC
Related parts for AM29F400AB-120EC
AM29F400AB-120EC Summary of contents
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... PRELIMINARY Am29F400AT/Am29F400AB 4 Megabit (524,288 x 8-Bit/262,144 x 16-Bit) CMOS 5.0 Volt-only, Sector Erase Flash Memory DISTINCTIVE CHARACTERISTICS 5.0 V 10% for read and write operations — Minimizes system level power requirements Compatible with JEDEC-standards — Pinout and software compatible with single-power-supply flash — Superior inadvertent write protection Package options — ...
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... SA1 SA0 detector au- CC Am29F400AT Sector Architecture SA10 SA9 SA8 SA7 SA6 SA5 SA4 SA3 SA2 SA1 SA0 Am29F400AB Sector Architecture Am29F400AT/Am29F400AB (x8) (x16) 7FFFFh 3FFFFh 16 Kbyte 7BFFFh 3DFFFh 8 Kbyte 79FFFh 3CFFFh 8 Kbyte 77FFFh 3BFFFh 32 Kbyte 6FFFFh 37FFFh 64 Kbyte 5FFFFh 2FFFFh 64 Kbyte ...
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... Am29F400A -65 - RY/BY Erase Voltage Generator PGM Voltage Generator Chip Enable Output Enable Logic Y-Decoder STB Timer X-Decoder Am29F400AT/Am29F400AB -90 -120 -150 90 120 150 90 120 150 DQ0–DQ15 Input/Output Buffers Data STB Latch Y-Gating Cell Matrix 20380B-3 ...
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... A12 A13 A14 A15 34 A16 BYTE DQ15/A DQ0 15 30 DQ7 29 DQ14 DQ8 16 28 DQ6 DQ1 17 27 DQ13 DQ9 18 26 DQ5 DQ2 19 DQ10 20 25 DQ12 24 DQ4 DQ3 DQ11 22 20380B-4 Am29F400AT/Am29F400AB ...
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... DQ11 DQ3 14 DQ10 15 DQ2 16 DQ9 17 DQ1 18 19 DQ8 20 DQ0 Standard TSOP Reverse TSOP Am29F400AT/Am29F400AB A16 48 BYTE DQ15/A-1 44 DQ7 DQ14 43 DQ6 42 DQ13 41 DQ5 40 DQ12 39 DQ4 DQ11 36 DQ3 ...
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... Hardware Reset Pin, Active Low RY/BY = Ready/Busy Output V = +5.0 Volt Single-Power Supply SS ( 10% for -90, -120, -150 for -75 Device Ground Write Enable LOGIC SYMBOL A-1 18 A0–A17 CE (E) OE (G) WE (W) RESET BYTE Am29F400AT/Am29F400AB DQ0–DQ15 RY/BY 20380B-7 ...
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... BOOT CODE SECTOR ARCHITECTURE T = Top sector B = Bottom sector Valid Combinations list configurations planned to be sup- ported in volume for this device. Consult the local AMD sales office to confirm availability of specific valid combinations and to check on newly released combinations. Am29F400AT/Am29F400AB Valid Combinations 7 ...
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... V typically reduced to less than TTL standby mode is achieved with the CE pin held at V this condition the current is typically reduced to 1 mA. In the standby mode the outputs are in the high imped- ance state, independent of the OE input. Am29F400AT/Am29F400AB ) DQ0– ...
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... IL (AMD=01H) and byte 1 ( code (Am29F400AT = 23H and Am29F400AB = ABH for x8 mode; Am29F400AT = 2223H and Am29F400AB = 22ABH for x16 mode). These two bytes/words are given in the table below. All identifiers for manufacturer and device will exhibit odd parity with DQ7 defined as the parity bit ...
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... SA2 0 1 SA3 0 1 SA4 1 0 SA5 1 0 SA6 1 1 SA7 1 1 SA8 1 1 SA9 1 1 SA10 1 1 Table 6. Sector Address Tables (Am29F400AB) A17 A16 SA0 0 0 SA1 0 0 SA2 0 0 SA3 0 0 SA4 0 0 SA5 0 1 SA6 0 1 SA7 1 0 SA8 ...
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... Erase Suspend (B0H) and Erase Resume (30H) com- mands are valid only while the Sector Erase operation is in progress. Moreover, both Reset/Read commands are functionally equivalent, resetting the device to the read mode. Am29F400AT/Am29F400AB 11 ...
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... This default value en- sures that no spurious alteration of the memory content occurs during the power transition. Refer to the AC Read Characteristics and Waveforms for the specific timing parameters. Am29F400AT/Am29F400AB Fifth Bus Sixth Bus Write Cycle Write Cycle ...
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... Following the command write, a read cycle from ad- dress XX00H retrieves the manufacture code of 01H. A read cycle from address XX01H returns the device code (Am29F400AT = 23H and Am29F400AB = ABH for x8 mode; Am29F400AT = 2223H and Am29F400AB = 22ABH for x16 mode) (see Tables 3 and 4). ...
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... Resume command at this point will be ignored. An- other Erase Suspend command can be written after the chip has resumed erasing. Table 8. Write Operation Status DQ7 DQ7 0 DQ7 0 Am29F400AT/Am29F400AB ave DQ6 DQ5 DQ3 Toggle ...
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... To insure the command has been ac- cepted, the system software should check the status of DQ3 prior to and following each subsequent sector erase command. If DQ3 were high on the second sta- tus check, the command may not have been accepted. Refer to Table 8: Write Operation Status. Am29F400AT/Am29F400AB 15 ...
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... Power-Up Write Inhibit Power-up of the device with VIL and will not accept commands on the rising edge of WE. IH The internal state machine is automatically reset to the read mode on power-up. Am29F400AT/Am29F400AB power-up CC (see DC Characteristics section for < the command register is CC LKO > ...
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... EMBEDDED ALGORITHMS Increment Address Program Command Sequence (Address/Command): Figure 1. Embedded Programming Algorithm Start Write Program Command Sequence (see below) Data Poll Device No Last Address ? Yes Programming Completed 5555H/AAH 2AAAH/55H 5555H/A0H Program Address/Program Data Am29F400AT/Am29F400AB 20380B-8 17 ...
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... Write Erase Command Sequence (see below) Data Polling or Toggle Bit Successfully Completed Erasure Completed Individual Sector/Multiple Sector Erase Command Sequence (Address/Command): Sector Address/30H Sector Address/30H Sector Address/30H Figure 2. Embedded Erase Algorithm Am29F400AT/Am29F400AB 5555H/AAH 2AAAH/55H 5555H/80H 5555H/AAH 2AAAH/55H Additional sector erase commands are optional 20380B-9 ...
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... Addr=VA operation = Valid address equals any non-protected sector group address during chip erase Yes DQ7=Data ? No No DQ5=1 ? Yes Read Byte (DQ0-DQ7) Addr=VA Yes DQ7=Data ? Pass No Fail Figure 3. Data Polling Algorithm Am29F400AT/Am29F400AB 20380B-10 19 ...
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... Addr=Don’t Care No DQ6=Toggle ? Yes No DQ5=1 ? Yes Read Byte (DQ0–DQ7) Addr=Don’t Care No DQ6=Toggle ? Yes Fail Figure 4. Toggle Bit Algorithm -2 Maximum Negative Overshoot Waveform 2 Maximum Positive Overshoot Waveform Am29F400AT/Am29F400AB Pass 20380B-11 20380B-12 20380B-13 ...
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... Ambient Temperature (T V Supply Voltages CC V for Am29F400T/B-65 +4. +5. for Am29F400T/B-70, -90, CC -120, -150 . . . . . . . . . . . . . . . . . . . +4. +5.50 V Operating ranges define those limits between which the func- tionality of the device is guaranteed Am29F400AT/Am29F400AB ). . . . . . . . . . . . 0˚C to +70˚ -40˚C to +85˚ -55˚C to +125˚ ...
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... V OUT Max 5 5.8 mA Min -2.5 mA Min Am29F400AT/Am29F400AB Min Max Unit 1 Max 1.0 A Byte 40 mA Word 1 –0.5 0 11.5 12.5 V 0.45 V 2.4 V 3.2 4.2 V ...
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... Max 5 5.8 mA Min –2.5 mA Min –100 Min Am29F400AT/Am29F400AB Min Typ Max Unit 1 1 -0.5 0 0.3 CC 11.5 12.5 V 0.45 V 0.85 ...
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... Max 5 Input Pulse Levels: 0. 2.4 V Timing Measurement Reference Level: 0.8 V and 2.0 V input and output 3. Output Driver Disable Time 4. Not 100% tested. 5.0 V IN3064 2 Equivalent C L 6.2 k Figure 7. Test Conditions Am29F400AT/Am29F400AB Speed Option (Notes 1 and 2) -70 -90 -120 -150 70 90 120 150 70 90 120 150 ...
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... Min 0 Min 0 Min 35 Min 20 Byte Typ 7 Word Typ 14 Typ 1.0 Max 8 Min 50 (Notes 2, 3) Min 500 Min 4 Min 500 Max 20 Min 30 Min 4 Am29F400AT/Am29F400AB -70 -90 -120 -150 Unit 70 90 120 150 150 ...
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... Don’t Care, Any Change Permitted Does Not Apply t RC Addresses Stable t ACC Output Valid Am29F400AT/Am29F400AB OUTPUTS Will Be Steady Will Be Changing from Will Be Changing from Changing, State Unknown Center Line is High- Impedance “Off” State ...
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... These waveforms are for the x16 mode. Figure 10. AC Waveforms Chip/Sector Erase Operations Data Polling WHWH1 DQ7 OUT t AH 2AAAH 5555H 5555H t AS 55H 80H AAH Am29F400AT/Am29F400AB 20380B-16 2AAAH SA 55H 10H/30H 20380B-17 27 ...
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... Figure 12. AC Waveforms for Toggle Bit During Embedded Algorithm Operations DQ7 t WHWH DQ0-DQ6=Invalid * DQ6=Toggle DQ6=Toggle t OE Am29F400AT/Am29F400AB High Z DQ7= Valid Data DQ0-DQ6 Valid Data 20380B-18 DQ6= DQ0-DQ7 Stop Toggling Valid 20380B-19 ...
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... SWITCHING WAVEFORMS CE WE RY/BY Figure 13. RY/BY Timing Diagram During Program/Erase Operations RESET The rising edge of the last WE signal Entire programming or erase operations t BUSY Ready Figure 14. RESET Timing Diagram Am29F400AT/Am29F400AB 20380B-20 20380B-21 29 ...
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... Figure 15. BYTE Timing Diagram for Read Operation CE WE BYTE Figure 16. BYTE Timing Diagram for Write Operations Data Output Data Output (DQ0-DQ14) (DQ0-DQ7) DQ15 Address Output Input t FLQZ The falling edge of the last WE signal t SET ( HOLD AH Am29F400AT/Am29F400AB 20380B-22 20380B-23 ...
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... Figure 17. Temporary Sector Unprotect Algorithm 12 V RESET t VIDR CE WE RY/BY Figure 18 Start RESET = V ID (Note 1) Perform Erase or Program Operations RESET = V IH Temporary Sector Group Unprotect Completed (Note 2) Program or Erase Command Sequence Temporary Sector Unprotect Timing Diagram Am29F400AT/Am29F400AB 20380B- 20380B-25 31 ...
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... Min 0 Read (Note 2) Min 0 Toggle and Data Min 10 Polling (Note 2) Min 0 Min 0 Min 0 Min 35 Min 20 Byte Typ 7 Word Typ 14 Typ 1.0 Max 8 Max 20 Am29F400AT/Am29F400AB -70 -90 -120 -150 Unit 70 90 120 150 ...
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... DQ7 Limits Max Unit 8 sec Excludes 00H programming prior to erasure 88 sec Excludes 00H programming prior to erasure 300 (Note 3) s Excludes system-level overhead (Note 4) 600 s Excludes system-level overhead (Note 4) 10.8 (Notes 3, 5) sec Excludes system-level overhead (Note 4) , 100,000 cycles. CC Am29F400AT/Am29F400AB D OUT 20380B-26 Comments 33 ...
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... V, one pin at a time. CC Test Setup OUT Test Setup Typ 8.5 OUT Test Conditions 150 C 125 C Am29F400AT/Am29F400AB Min Max –1 1 –100 mA +100 mA Typ Max Unit 6 7 Max Unit 7 ...
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... Corrected WE for read operations; was don’t care (X), is now H. Standby Mode: Corrected standby mode current; was 100 A, is now 5 A. Table 5, Sector Address Tables (Am29F400AB): Corrected x16 starting address for SA5; was 1C000h, is now 28000h Erase Suspend: Third paragraph, third sentence: Deleted the word “ ...