AK2305 AKM Semiconductor, Inc., AK2305 Datasheet

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AK2305

Manufacturer Part Number
AK2305
Description
Manufacturer
AKM Semiconductor, Inc.
Datasheet

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AK2305
Manufacturer:
AKM
Quantity:
20 000
ASAHI KASEI
AK2305 is a dual PCM CODEC-Filter most
suitable for ISDN Terminal Adapter. A-law/u-law
is selected by the internal register.
In addition to CODEC, this device has dual DTMF
receiver and External Tone Input pin.
Input/output operational amplifiers included in
this device are used for transmit/receive gain
adjustment. AK2305 has internal volume control
to attenuate signal from 0dB to –12dB by 3dB step
control which is defined by an internal register
written through the serial interface.
PCM interface of AK2305 accepts several clock
formats, which are Long Frame, Short Frame,
GCI, IDL. 64k-4096kHz clock input is available
for PCM interface.
C0029-E-02
GENERAL DESCRIPTION
Dual PCM CODEC for ISDN TERMINAL ADAPTER
1
-
-
-
-
-
-
-
-
-
-
-
-
- 48LQFP
Dual PCM CODEC and Filtering systems for
Dual DTMF Receiver
External Tone Input(AUX)
Independent functions on each channel
Selectable PCM Data Interface Timing:
Variable PCM Data Rate:
Operational Amplifier for Gain Adjustment
A-law/u-law Register Selectable
Serial Interface
Power on Reset
Single +5V ± 5% CMOS technology
Low Power Consumption (85mW typ)
ISDN Terminal Adapter
Long Frame / Short Frame / GCI / IDL
64k x N [Hz] (64k - 4.096MHz)
9.0 x 9.0 mm (0.5mm pin pitch)
- Frame Sync Signal(8kHz)
- Power Down Mode(Pin/Register operation)
- Mute(Pin/Register operation)
- Gain Adjustment: 0 to -12dB (3dB step)
PACKAGE
FEATURE
AK2305
[AK2305]
1999/8

Related parts for AK2305

AK2305 Summary of contents

Page 1

... ASAHI KASEI Dual PCM CODEC for ISDN TERMINAL ADAPTER GENERAL DESCRIPTION AK2305 is a dual PCM CODEC-Filter most suitable for ISDN Terminal Adapter. A-law/u-law is selected by the internal register. In addition to CODEC, this device has dual DTMF receiver and External Tone Input pin. ...

Page 2

... TONE GENERATOR…………………..……… AUX INPUT…….……………………………….. 21 - SERIAL INTERFACE………….………….…… [AK2305] PAGE 3 5 ...

Page 3

... TST1 TST2 C0029-E-02 BLOCK DIAGRAM AAF0 CODEC CH0 S1 SMF0 S2 S3 AAF1 CODEC CH1 S4 SMF1 DTMF Receiver0 DTMF Receiver1 PLL 16 5 LPC 3 [AK2305] PCM I/F 29 DX0 33 DR0 26 FS0 27 BCLK 28 DX1 32 DR1 25 FS1 22 TNOE0 TONEGEN0 21 TONEGEN1 TNOE1 8 AUX 18 MUTE0 17 MUTE1 37- DTO00-03 ...

Page 4

... ASAHI KASEI DTO00 DTO01 DTO02 DTO03 DTO10 DTO11 DTO12 DTO13 TST1 DTIN0 GSX0 VFX0 C0029-E-02 PIN ASSIGNMENT [AK2305] 24 STD0 23 STD1 22 TNOE0 21 TNOE1 20 DTOE MUTE0 17 MUTE1 16 TST2 15 DTIN1 14 GSX1 13 VFX1 1999/8 ...

Page 5

... Hi-Z 50pF Hi-Z 10k 50pF Hi-Z 10k (*1) 15pF L 15pF L 15pF Hi-Z 15pF Hi-Z 15pF Input 15pF Hi-Z 15pF Hi-Z 15pF Hi-Z 15pF Hi-Z 15pF Hi-Z 15pF Hi-Z 15pF Hi-Z 15pF Hi-Z 50pF 10k (*1) Hi-Z 5 [AK2305] Output status Remarks (Reset) Hi-Z Hi-Z external cap external cap Hi-Z Hi-Z Hi-Z Hi-Z Factory use only L L (*2) Hi-Z Hi-Z (*3) Input Hi-Z Hi-Z Hi-Z Hi-Z Hi-Z Hi-Z Hi-Z Hi-Z Factory use only Hi-Z 1999/8 ...

Page 6

... In Long Frame / Short Frame mode, input PCM data of ch1. The PCM data rate is synchronized with BCLK. See “PCM INTERFACE” from page 9. In GCI / IDL mode, this pin is pulled down to VSS. Frame sync input for channel 0. 26 FS0 I FS0 must be 8KHz clock synchronized in BCLK. C0029-E-02 PIN FUNCTION Function 6 [AK2305] 1999/8 ...

Page 7

... To stabilize the analog ground, connect to AVSS with 0.1uF or larger. Digital positive supply voltage. System digital +5V supply. Digital negative supply voltage. System digital ground. Analog positive supply voltage. Systems analog +5V supply. Analog negative supply voltage. System analog ground. Only for factory use. Should to be fixed to DVSS. 7 [AK2305] Function 1999/8 ...

Page 8

... SERIAL I/F 1word=14bit; Instruction code: 2bit, address: 3bit, data: 9bit(1dummy bit included). PLL generates system clock of AK2305. Reference clock is FSn (8KHz). More than PLL 0.22uF of an external capacitance should be connected between LPC and AVSS. PCM data rate is available for 64xN 64)kHz which synchronizes with PCM I/F BCLK ...

Page 9

... Note Keep supplying the first FS except for the state of all power down(PD=”H”). If the first FS is not supplied, AK2305 loses timing result, DTMFR and TONE GEN become not guaranteed to work normally. BCLK This clock decides the PCM data rate. See the following table of the relation between BCLK and PCM data rate ...

Page 10

... ASAHI KASEI Long Frame Sync(LF) Short Frame Sync(SF) AK2305 automatically decides whether Long Frame or Short Frame should be selected, by monitoring the high level period of First FS. Period of First FS =”H” more than 2 clock of BCLK 1 clock of BCLK INTERFACE TIMING <2ch Multiplex> PCM data of both channel are interfaced by the DX0 and DR0(DX1 and DR1 are not used) at the format of 8bits in the period of 1 frame(125us) which synchronizes with the FSn(n=0,1) ...

Page 11

... ch0 output ch0 input ch1 output ch1 input [AK2305 1999/8 ...

Page 12

... DX0 Don’t DR0 care B1-CHANNEL(CH0) <SEL2B=”0”> <Non Multiplex> Not supported. C0029-E-02 CH1 Remarks B2 Reset B2-CHANNEL(CH1) <SEL2B=”0”> [AK2305] 8 Don’t 8 care 1999/8 ...

Page 13

... DR0 care B1-CHANNEL(CH0) <Non Multiplex> Not supported. C0029-E-02 CH1 Remarks B2 Reset Don’ care <SEL2B=”0”> 13 [AK2305 B2-CHANNEL(CH1) <SEL2B=”0”> 8 Don’t 8 care 1999/8 ...

Page 14

... ASAHI KASEI RESET POWER ON RESET AK2305 automatically generates the internal reset pulse at the time of power on. Then all circuits are reset and internal registers are initialized. After reset operation, CODEC CH0/CH1 circuits start to be initialized. It takes 150ms(typ.), 330ms(max) from power on to completion of initialization. ...

Page 15

... PD ”1” : Power down PDCH0 PDCH1 ”0” : Normal ”1” : Power down PDDT0 PDDT1 15 [AK2305] Note - Registers are not reset. - Serial I/F is available need to supply FSn(n=0,1),BCLK. - Keep supplying first FS, even when CODEC CH0,1 are in power down mode (see page8). - Even when CODEC CHn(n=0, ...

Page 16

... OFF OFF OFF OFF OFF OFF OFF OFF OFF OFF OFF 16 CODEC DTMFR0 DTMFR1 CH0, DTMFR0 PDCH0 PDDT0 PDDT1 PDDT0 OFF OFF OFF OFF OFF OFF OFF OFF [AK2305] CODEC CH1, DTMFR1 PDCH1 PDDT1 OFF OFF OFF OFF OFF OFF 1999/8 ...

Page 17

... AGND* DXn pin VRXn pin (n=0,1) (n=0,1) PCM data output CODEC analog output* (MUTE0,1pin=”0”) High-Impedance B2-CHANNEL(CH1) <SEL2B=”0”> 17 [AK2305] Remarks *)TONE circuits are avialable even if the mute operates. Remarks Reset Don’ ...

Page 18

... Analog input/output gain can be adjusted at the range from0 to -12dB (3dB/step*5steps) by register. VR register VRnT2 VRnT1 VRnR2 VRnR1 VRTN2 VRTN1 This table is applicable to VR0T,VR0R,VR1T, VR1R ,and VRTN registers. C0029-E-02 VRnT0 VRnR0 Gain VRTN0 - [AK2305] Remarks Reset 1999/8 ...

Page 19

... Guard Time Guard Time Guard Time [AK2305] ) GTP ) GTA ) is shown. 1999/8 ...

Page 20

... ID tID[ms]=tGTA+tDA min typ max 1.5 5 9.5 9.5 13 17.5 tGTA default 17.5 21 25.5 25.5 29 33.5 33.5 37 41.5 41.5 45 49.5 49.5 53 57.5 57.5 61 65.5 65.5 69 73.5 73.5 77 81.5 81.5 85 89.5 89.5 93 97.5 97.5 101 105.5 105.5 109 113.5 113.5 117 121.5 121.5 125 129.5 20 [AK2305] tDP[ms] min typ max tDA[ms] min typ max 0.5 4 8.5 1999/8 ...

Page 21

... OF OUTPUT PIN” above.) Must input with an external cap(>0.1uF.) Input impedance is 200k ±25%. C0029-E-02 Remarks 400Hz Reset 1300Hz VRX1 TNOUT [AK2305] Register setting Remarks “0” : OFF All “0” “1” when reset 1999/8 ...

Page 22

... When the next access is going to be done , if CS remains to be “L”, successive access can not be done. C0029-E- Data for setting internal registers * Read/Write Read Write No action (8bit) th pulse. th pulse. th pulse. th [AK2305] pulse. 1999/8 ...

Page 23

... DATApin : Input Status Instruction Address WRITE data to code ”010” address”010” Address WRITE data to ”010” address”010” Not Execute [AK2305 (Hi- 1999/8 ...

Page 24

... Address READ data from ”010” address”010” Not Execute Other codes Address WRITE/READ is (not Instruction ”010” not executed code) [AK2305 1999/8 ...

Page 25

... Bit VR0T2 VR0T1 VR0T0 VR1T2 VR1T1 VR1T0 PCMIF0 SEL2B 1stFS - - ALAWN GTA2 GTA1 GTA0 25 [AK2305] Bit Bit Bit VR0R2 VR0R1 - VR1R2 VR1R1 - VRTN2 VRTN1 - S3 S2 PDDT1 PDDT0 PDCH1 MTDX1 MTDX0 TMD1 GTP3 ...

Page 26

... Switch regulation for tone output 0 0: Tone OFF 1: Tone Not used - Dummy bit 0 Switch regulation for tone output 0 0: Tone OFF 1: Tone Not used 0 Switch regulation for tone output 0 0: Tone OFF 1: Tone Not used - Dummy bit 26 [AK2305] Refer 1999/8 ...

Page 27

... PCM output(DX0,1pin) Mute 0: PCM OUT 1: PCM MUTE 0 A-law/u-law select 1 0:A-law 1:u-law 0 0 Not used 0 - Dummy bit 0 0 DTMF Receiver 0 Guard Time t setting GTP DTMF Receiver 0 Guard Time t setting GTA 0 - Dummy bit 27 [AK2305] Refer 1999/8 ...

Page 28

... Except for DTOn0-n3(n=0,1) Tri-state mode 28 Min Max -0.3 6.5 -0.3 6.5 -0.1 0.1 -0.3 AVDD+0.3 -0.3 AVDD+0.3 -10 10 -55 125 Min Typ Max 4.75 5.0 5.25 4.75 5.0 AVDD - FS0,FS1=8kHz. o Min Typ Max 85 105 60 78.8 0.8VDD 0.4 2.0 0.8 -10 +10 5 -10 +10 [AK2305] Units Units kHz Units 1999/8 ...

Page 29

... Relative to: 0 ~3.0kHz 0dBm0@1020Hz 3.4kHz 4.0kHz Conditions 1020Hz Tone -40dBm0 ~-45dBm0 -30dBm0 ~-40dBm0 0dBm0 ~-30dBm0 1020Hz Tone -40dBm0 ~-45dBm0 -30dBm0 ~-40dBm0 0dBm0 ~-30dBm0 -6dBm@860Hz,1380Hz 29 [AK2305] Min Typ Max Units 0.849 Vrms -0.6 - 0.6 dB 0.849 Vrms -0.6 - 0.6 dB 1.219 Vrms Min Typ ...

Page 30

... PCM CODE 8.4 ~100kHz Conditions 0dBm0@VFXIN, Idle PCM code 0dBm0 code level, VFXIN = 0 Vrms 0dBm0@VFXIN, Idle PCM code 0dBm0 code level, VFXIN = 0 Vrms Conditions 0dBm0@VFXIN, Idle PCM code 0dBm0 code level, VFXIN = 0 Vrms 30 [AK2305] Min Typ Max Units - - 560 220 - ...

Page 31

... C0029-E-02 Conditions 0.6V < V < 4.2V Conditions 0dBm0 PCM code Conditions 0.6V < V < 4.2V Pin Conditions Relative to: 0dB Pin Conditions Input with 0.1uF: 3kHz VRTN=0dB Input: 1kHz, -9dBm VRTN=0dB Input: 10kHz, -9dBm VRTN=0dB 31 [AK2305] Min Typ Max Units -100 - +100 ...

Page 32

... Note6)For error rate of better than 1 in 10,000. Note7)Referenced to minimum valid accept level. Note8)Twist = high tone / low tone Note) dBm = decibels above or below a reference power of 1mW into a 600 load. C0029-E-02 Conditions min 381 1290 Conditions ±3.5% 32 [AK2305] typ Max Units 400 419 Hz 1300 1310 Hz -11 -10 -9 ...

Page 33

... QSTD t R =10k, C PTE =10k, C PTD REC TONE # GTP GTA t PQ DECODED TONE #n t PSTD t t QSTD PTD Figure 1 : DTMF Receiver Timing 33 [AK2305] Min Typ Max 0 =50pF 10 40 =50pF 10 40 ...

Page 34

... DZCL t 1 WFSL t 40 HBFS t 40 SFBS (Note1 DZCS 1/t 512 DZCG t 40 SDBG t 40 HBDG 1/t 256 PB 34 [AK2305] Max Unit Ref fig - kHz 4096 kHz ns ns Fig Fig Fig.4 Fig Fig BCLK ns Fig ...

Page 35

... WFSL PCM Interface Timing < Long Frame > WBL WBH PB t DBD MSB SDB MSB PCM Interface Timing < Short Frame > DBD DBD HBD [AK2305] t DZCL t DZCL DZCS 8 8 1999/8 ...

Page 36

... HBD t SDB Figure5 : PCM Interface Timing < IDL > PBG WBH t WBL t DZCG MSB MSB PBI WBH t WBL t DZCS MSB MSB [AK2305 1999/8 ...

Page 37

... WCL t 80 HCS t 40 SCS t 100 R t 100 SDC t 40 HDC t 0 HCS2 t 0 DVD t 60 DDD DZSD DZCD t 40 WCH [AK2305] Unit Ref fig MHz ns ns SCLK Fig Fig Fig Fig 1999/8 ...

Page 38

... Serial Interface Timing < WRITE > t WCL WSH WSL PSCLK Figure7 : Serial Interface Timing < READ > t WCH Z I1 Figure8 : Serial Interface Timing < READ > DVD t DDD DZCD [AK2305] t HCS2 t HCS2 1999/8 ...

Page 39

... ASAHI KASEI Analog input circuit(AMPT0,1) AK2305 has an op-amp at analog input of each channel. adjustment. Op-amp can be used as an inverting amplifier. Feedback resistor must be 10k or larger C1=0.47uF R1=R2=33kOhm Analog output circuit(AMPR0,1) AK2305 has an op-amp at analog input of each channel. adjustment. Op-amp can be used as an inverting amplifier. Feedback resistor must be 10k or larger. ...

Page 40

... ASAHI KASEI DTIN0, DTIN1 INPUT There are the following 2 cases in case of that DTMF tone is input through DTIN0,DTIN1. (1)DTMF tone is output from AMPT0,AMPT1 included AK2305 Connect GSXn with DTINn directly. AK2305 GSXn DTINn (2) DTMF tone is output from an external amplifier DTMF tone is input to DTIN0,DTIN1 through an external capacitance of more than 0.1uF. ...

Page 41

... To use the same supply for both digital and analog power supply (DVDD and AVDD), insert 10 resistor between AVDD and DVDD. AVSS and DVSS must be separated on the board, and connected them at power supply unit. AK2305 AVDD AVSS DVDD DVSS C0029-E- Ground of Power Supply Unit 41 C1=C3=0.1uF C2=C4=10uF C1=C3=0.1uF C2=C4=10uF R1=10 Ohm [AK2305] 1999/8 ...

Page 42

... ASAHI KASEI - 48pin LQFP Marking (1) Pin#1 indication (2) Date Code: 5 digit XXXXX (3) Marketing Code: AK2305 (4) AKM Logo Outline Dimensions 37 48 0.50±0.2 C0029-E-02 PACKAGING INFOMATION AKM 9.0±0.2 7 0.19±0.05 0°~10° 42 1.7MAX 0.10 0.10±0.07 0.17± ...

Page 43

... AKM harmless from any and all claims arising from the use of said product in the absence of such notification. C0029-E-02 IMPORTANT NOTICE 43 [AK2305] 1999/8 ...

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