ISL59483IRZ-T13 Intersil, ISL59483IRZ-T13 Datasheet - Page 15

• Manufacturer Part Number: ISL59483IRZ-T13
• Description: IC MUX AMP DUAL 500MHZ 48-QFN
• Manufacturer: Intersil

Specifications of ISL59483IRZ-T13

• Applications: 4:1 Multiplexer-Amplifier
• Number Of Circuits: 3
• -3db Bandwidth: 500MHz
• Slew Rate: 1600 V/µs
• Current - Supply: 92mA
• Current - Output / Channel: 125mA
• Mounting Type: Surface Mount
• Package / Case: 48-VQFN
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

• Use proper value and location of termination resistors.
• When testing, use good quality connectors and cables,
• A minimum of 2 power supply decoupling capacitors are
• The NIC pins are placed on both sides of the input pins.
The QFN Package Requires Additional PCB Layout
Rules for the Thermal Pad
The thermal pad is electrically connected to V- supply
through the high resistance IC substrate. Its primary function
is to provide heat sinking for the IC. However, because of the
connection to the V1- and V2- supply pins through the
substrate, the thermal pad must be tied to the V- supply to
prevent unwanted current flow to the thermal pad. Do not tie
this pin to GND as this could result in large back biased
currents flowing between GND and the V- pins. Maximum
AC performance is achieved if the thermal pad is attached to
a dedicated decoupled layer in a multi-layered PC board. In
cases where a dedicated layer is not possible, AC
performance may be reduced at upper frequencies.
CHANNEL SELECT
CHANNELS B & C
LOGIC INPUTS
Termination resistors should be as close to the device as
possible.
matching cable types and keeping cable lengths to a
minimum.
recommended (1000pF, 0.01µF) as close to the devices
as possible. Avoid vias between the cap and the device
because vias adds unwanted inductance. Larger caps can
be farther away. When vias are required in a layout, they
should be routed as far away from the device as possible.
These pins are not internally connected to the die. It is
recommended these pins be tied to ground to minimize
crosstalk.
CH0A - CH7A
NOT SHOWN
CH0
CH1
CH2
CH3
CH4
CH5
CH6
CH7
S0
S1
S2
FIGURE 44. APPLICATION CIRCUIT FOR A DUAL GAIN 8:1 RGB VIDEO MUX
15
S0-2
S1-2
HIZ2
IN0A1
IN1A1
IN2A1
IN3A1
S0-1
S1-1
HIZ1
IN0A2
IN1A2
IN2A2
IN3A2
1/3 MUX-AMP1
CONTROL
CONTROL
ISL59483
LOGIC
LOGIC
1/3 MUX-AMP2
ISL59483
+1
+2
OUTA2
OUTA1
The thermal pad requirements are proportional to power
dissipation and ambient temperature. A dedicated layer
eliminates the need for individual thermal pad area. When a
dedicated layer is not possible, an isolated thermal pad on
another layer should be used. Pad area requirements should
be evaluated on a case by case basis.
MUX Application Circuits
Each of the two 4:1 triple MUX amplifiers have their own
binary-coded, TTL compatible channel select logic inputs
(S0-1, 2, and S1-1, 2). All three amplifiers are switched
simultaneously from their respective inputs with S0-1 S1-1
controlling MUX 1, and S0-2, S1-2 controlling MUX 2.
The HIZ control inputs (HIZ1, HIZ2) and device enable control
inputs (EN1 and EN2) control MUX 1 and MUX 2 in a similar
fashion. The individual control for each 4:1 triple MUX enables
external connections to configure the device for different MUX
applications.
8:1 RGB Dual Gain Video MUX
The triple input RGB 8:1 MUX (Figure 44) connects the RGB
amplifier output of MUX 1 to the parallel-connected RGB
amplifier output of MUX 2 to produce a single RGB video
output. Input channels CH0 to CH3 are assigned to MUX 1
and have a throughput gain of 1. Channels CH4 through
CH7 are assigned to MUX 2 and have a throughput gain of
2. Channels CH0 through CH3 are selected by setting S2
low, which forces HIZ1 low and HIZ2 high (enables MUX 1
and three-states MUX 2). Setting S2 high reverses the logic
inputs of HIZ1, HIZ2 and switches from MUX 1 to MUX 2,
enabling the selection of channels CH4 through CH7. The
channel select inputs are parallel connected (S0-1 to S0-2)
and S1-1 to S1-2) to form two logic controls, S0 and S1. The
logic control truth table is shown in Figure 44.
* R
* R
* OPTIONAL - DEPENDING ON PARASITIC CAPACITANCE
OUTA1
OUTA2
OUTA
S2
0
0
0
0
1
1
1
1
CHANNEL SELECT TRUTH TABLE
S1
0
0
1
1
0
0
1
1
8:1 VIDEO MUX
S0
0
1
0
1
0
1
0
1
GAIN
1
1
1
1
2
2
2
2
OUTA, B, C
CH0A, B, C
CH1A, B, C
CH2A, B, C
CH3A, B, C
CH4A, B, C
CH5A, B ,C
CH6A, B, C
CH7A, B, C
May 21, 2007
FN6394.2