AT32UC3A0256AU Atmel Corporation, AT32UC3A0256AU Datasheet - Page 701
AT32UC3A0256AU
Manufacturer Part Number
AT32UC3A0256AU
Description
Manufacturer
Atmel Corporation
Datasheets
1.AT32UC3A0128.pdf
(98 pages)
2.AT32UC3A0128.pdf
(826 pages)
3.AT32UC3A0128.pdf
(377 pages)
4.AT32UC3A0128.pdf
(33 pages)
5.AT32UC3A0128.pdf
(159 pages)
6.AT32UC3A0128AU.pdf
(2 pages)
Specifications of AT32UC3A0256AU
Flash (kbytes)
256 Kbytes
Pin Count
144
Max. Operating Frequency
66 MHz
Cpu
32-bit AVR
# Of Touch Channels
32
Hardware Qtouch Acquisition
No
Max I/o Pins
109
Ext Interrupts
109
Usb Transceiver
1
Usb Speed
Full Speed
Usb Interface
Device + OTG
Spi
6
Twi (i2c)
1
Uart
4
Ssc
1
Ethernet
1
Graphic Lcd
No
Video Decoder
No
Camera Interface
No
Adc Channels
8
Adc Resolution (bits)
10
Adc Speed (ksps)
384
Resistive Touch Screen
No
Dac Channels
2
Dac Resolution (bits)
16
Temp. Sensor
No
Crypto Engine
No
Sram (kbytes)
64
Self Program Memory
YES
External Bus Interface
1
Dram Memory
sdram
Nand Interface
No
Picopower
No
Temp. Range (deg C)
-40 to 85
I/o Supply Class
3.0-3.6 or (1.65-1.95+3.0-3.6)
Operating Voltage (vcc)
3.0-3.6 or (1.65-1.95+3.0-3.6)
Fpu
No
Mpu / Mmu
Yes / No
Timers
10
Output Compare Channels
16
Input Capture Channels
6
Pwm Channels
13
32khz Rtc
Yes
Calibrated Rc Oscillator
Yes
Available stocks
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Part Number
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Quantity
Price
- AT32UC3A0128 PDF datasheet
- AT32UC3A0128 PDF datasheet #2
- AT32UC3A0128 PDF datasheet #3
- AT32UC3A0128 PDF datasheet #4
- AT32UC3A0128 PDF datasheet #5
- AT32UC3A0128AU PDF datasheet #6
- Current page: 701 of 826
- Download datasheet (11Mb)
32058K AVR32-01/12
33.5.2
33.5.3
33.5.4
33.5.5
33.5.6
Analog Inputs
Power Manager
Interrupt Controller
Timer Triggers
Conversion Performances
The analog input pins can be multiplexed with PIO lines. In this case, the assignment of the ADC
input is automatically done as soon as the corresponding channel is enabled by writing the
CHER register . By default, after reset, the PIO line is configured as input with its pull-up enabled
and the ADC input is connected to the GND.
The ADC is automatically clocked after the first conversion in Normal Mode. In Sleep Mode, the
ADC clock is automatically stopped after each conversion. As the logic is small and the ADC cell
can be put into Sleep Mode, the Power Manager(PM) has no effect on the ADC behavior.
The ADC interrupt line is connected on one of the internal sources of the Interrupt Controller.
Using the ADC interrupt requires the INTC to be programmed first.
Timer Counters may or may not be used as hardware triggers depending on user requirements.
Thus, some or all of the timer counters may be non-connected.
For performance and electrical characteristics of the ADC, see the DC Characteristics section.
AT32UC3A
701
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