AT32UC3B1128 Atmel Corporation, AT32UC3B1128 Datasheet - Page 5
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AT32UC3B1128
Manufacturer Part Number
AT32UC3B1128
Description
Manufacturer
Atmel Corporation
Datasheets
1.AT32UC3A0128.pdf
(377 pages)
2.AT32UC3A0128.pdf
(33 pages)
3.AT32UC3A0128.pdf
(159 pages)
4.AT32UC3B0128.pdf
(684 pages)
5.AT32UC3B0128.pdf
(107 pages)
Specifications of AT32UC3B1128
Flash (kbytes)
128 Kbytes
Pin Count
48
Max. Operating Frequency
60 MHz
Cpu
32-bit AVR
# Of Touch Channels
32
Hardware Qtouch Acquisition
No
Max I/o Pins
28
Ext Interrupts
28
Usb Transceiver
1
Usb Speed
Full Speed
Usb Interface
Device
Spi
3
Twi (i2c)
1
Uart
2
Graphic Lcd
No
Video Decoder
No
Camera Interface
No
Adc Channels
6
Adc Resolution (bits)
10
Adc Speed (ksps)
384
Resistive Touch Screen
No
Temp. Sensor
No
Crypto Engine
No
Sram (kbytes)
32
Self Program Memory
YES
Dram Memory
No
Nand Interface
No
Picopower
No
Temp. Range (deg C)
-40 to 85
I/o Supply Class
3.0-3.6 or (1.65-1.95+3.0-3.6)
Operating Voltage (vcc)
3.0-3.6 or (1.65-1.95+3.0-3.6)
Fpu
No
Mpu / Mmu
Yes / No
Timers
10
Output Compare Channels
16
Input Capture Channels
6
Pwm Channels
13
32khz Rtc
Yes
Calibrated Rc Oscillator
Yes
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Part Number:
AT32UC3B1128-U
Manufacturer:
ATMEL/爱特梅尔
Quantity:
20 000
- AT32UC3A0128 PDF datasheet
- AT32UC3A0128 PDF datasheet #2
- AT32UC3A0128 PDF datasheet #3
- AT32UC3B0128 PDF datasheet #4
- AT32UC3B0128 PDF datasheet #5
- Current page: 5 of 377
- Download datasheet (5Mb)
2. Programming Model
2.1
2.2
32000D–04/2011
Data Formats
Data Organization
This chapter describes the programming model and the set of registers accessible to the user.
The AVR32 processor supports the data types shown in
Table 2-1.
When any of these types are described as unsigned, the N bit data value represents a non-neg-
ative integer in the range 0 to + 2
When any of these types are described as signed, the N bit data value represents an integer in
the range of -2
Some instructions operate on fractional numbers. For these numbers, the data value represents
a fraction in the range of -1 to +1-2
Data is usually stored in a big-endian way, see
multi-byte data is stored in memory, the most significant byte is stored at the lowest address. All
instructions are interpreted as being big-endian. However, in order to support data transfers that
are little-endian, special endian-translating load and store instructions are defined.
The register file can hold data of different formats. Both byte, halfword (16-bit) and word (32-bit)
formats can be represented, and byte and halfword formats are supported in both unsigned and
signed 2’s complement formats. Some instructions also use doubleword operands. Doubleword
data are placed in two consecutive registers. The most significant word is in the uppermost reg-
ister. Valid register pairs are R1:R0, R3:R2, R5:R4, R7:R6, R9:R8, R11:R10 and R13:R12.
Load and store operations that transfer bytes or halfwords, automatically zero-extends or sign-
extends the bytes or half-words as they are loaded.
Figure 2-1.
Type
Byte
Halfword
Word
Double Word
3 1
3 1
3 1
3 1
3 1
to p
S S S S S S S S S S S S S S S S
0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
S S S S S S S S S S S S S S S S S S S S S S S S
Overview of execution modes, their priorities and privilege levels.
N-1
Data representation in the register file
0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
to +2
N-1
u p p e r
-1, using two’s complement format.
Data Width
8 bits
16 bits
32 bits
64 bits
N
1 6
1 6
-1.
-(N-1)
S
1 5
1 5
, using two’s complement format.
lo w e r
Figure 2-1 on page
H a lfw o rd
H a lfw o rd
8
8
7
S
7
Table 2-1 on page
b o tto m
B y te
B y te
5. This means that when
0
0
0
0
0
S ig n e x te n d e d b y te
U n s ig n e d b y te
S ig n e x te n d e d h a lfw o rd
U n s ig n e d h a lfw o rd
W o rd
5:
AVR32
5
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