AT32UC3C264C Atmel Corporation, AT32UC3C264C Datasheet - Page 48
![no-image](/images/manufacturer_photos/0/0/79/atmel_corporation_sml.jpg)
AT32UC3C264C
Manufacturer Part Number
AT32UC3C264C
Description
Manufacturer
Atmel Corporation
Datasheets
1.AT32UC3A0128.pdf
(377 pages)
2.AT32UC3A0128.pdf
(159 pages)
3.AT32UC3C0128C.pdf
(1313 pages)
4.AT32UC3C0128C.pdf
(108 pages)
Specifications of AT32UC3C264C
Flash (kbytes)
64 Kbytes
Pin Count
64
Max. Operating Frequency
66 MHz
Cpu
32-bit AVR
Hardware Qtouch Acquisition
No
Max I/o Pins
45
Ext Interrupts
64
Usb Transceiver
1
Quadrature Decoder Channels
1
Usb Speed
Full Speed
Usb Interface
Device + OTG
Spi
5
Twi (i2c)
2
Uart
4
Can
2
Lin
4
Ssc
1
Ethernet
1
Graphic Lcd
No
Video Decoder
No
Camera Interface
No
Adc Channels
11
Adc Resolution (bits)
12
Adc Speed (ksps)
2000
Analog Comparators
2
Resistive Touch Screen
No
Dac Channels
2
Dac Resolution (bits)
12
Temp. Sensor
No
Crypto Engine
No
Sram (kbytes)
20
Self Program Memory
YES
Dram Memory
No
Nand Interface
No
Picopower
No
Temp. Range (deg C)
-40 to 85
I/o Supply Class
3.0 to 3.6 or 4.5 to 5.5
Operating Voltage (vcc)
3.0 to 3.6 or 4.5 to 5.5
Fpu
Yes
Mpu / Mmu
Yes / No
Timers
3
Output Compare Channels
13
Input Capture Channels
6
Pwm Channels
14
32khz Rtc
Yes
Calibrated Rc Oscillator
Yes
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
AT32UC3C264C-A2UR
Manufacturer:
INTERSIL
Quantity:
1 670
Part Number:
AT32UC3C264C-U
Manufacturer:
ATMEL/爱特梅尔
Quantity:
20 000
6.1.4
6.1.4.1
6.1.4.2
32117CS–AVR-08/11
Power-up Sequence
Maximum Rise Rate
Minimum Rise Rate
Figure 6-2.
To avoid risk of latch-up, the rise rate of the power supplies must not exceed the values
described in
Recommended order for power supplies is also described in this table.
The integrated Power-Reset circuitry monitoring the powering supply requires a minimum rise
rate for the VDDIN_5 power supply.
See
If the application can not ensure that the minimum rise rate condition for the VDDIN power sup-
ply is met, the following configuration can be used:
• A logic “0” value is applied during power-up on pin RESET_N until:
C
IN2
Table 7-2 on page 51
– VDDIN_5 rises above 4.5V in 5V single supply mode.
– VDDIN_33 rises above 3V in 3.3V single supply mode.
C
C
OUT2
GNDCORE
VDDCORE
IN1
VDDIN_33
Table 7-2 on page 51
3 Single Power Supply Mode
3.6V
3.0-
+
C
-
OUT1
VDDIO1
VDDIO2
VDDIO3
for the minimum rise rate value.
BOD33
BOD18
BOD50
POR
.
3.3V
1.8V
Reg
Reg
VDDIN_5
VDDANA
Analog: ADC, AC, DAC, ...
SCIF, BOD,
Peripherals
Memories
RCSYS
CPU
PLL
GNDANA
AT32UC3C
GNDPLL
GNDIO1
GNDIO2
GNDIO3
48