AT80C51RD2 Atmel Corporation, AT80C51RD2 Datasheet - Page 12

• Manufacturer Part Number: AT80C51RD2
• Manufacturer: Atmel Corporation

Specifications of AT80C51RD2

• Max. Operating Frequency: 60 MHz
• Cpu: 8051-12C
• Max I/o Pins: 32
• Spi: 1
• Uart: 1
• Sram (kbytes): 1.25
• Operating Voltage (vcc): 2.7 to 5.5
• Timers: 4
• Watchdog: Yes

7. Dual Data Pointer Register
Figure 7-1.
12
AT80C51RD2
7
Use of Dual Pointer
AUXR1(A2H)
The additional data pointer can be used to speed up code execution and reduce code size.
The dual DPTR structure is a way by which the chip will specify the address of an external data
memory location. There are two 16-bit DPTR registers that address the external memory, and a
single bit called DPS = AUXR1.0 (see Table 7-1) that allows the program code to switch
between them (Refer to Figure 7-1).
Table 7-1.
AUXR1- Auxiliary Register 1(0A2h)
Reset Value: XXXX XXXX0b
Not bit addressable
Note:
Number
Bit
7
-
DPS
7
6
5
4
3
2
1
0
0
1. Bit 2 stuck at 0; this allows to use INC AUXR1 to toggle DPS without changing GF3.
AUXR1 Register
Mnemonic
6
-
DPS
GF3
Bit
0
DPH(83H) DPL(82H)
-
-
-
-
-
Description
Reserved
The value read from this bit is indeterminate. Do not set this bit.
Reserved
The value read from this bit is indeterminate. Do not set this bit.
Reserved
Reserved
The value read from this bit is indeterminate. Do not set this bit.
This bit is a general purpose user flag.
Always cleared
Reserved
The value read from this bit is indeterminate. Do not set this bit.
Data Pointer Selection
Cleared to select DPTR0.
Set to select DPTR1.
DPTR1
5
-
DPTR0
(1)
.
4
-
GF3
3
External Data Memory
2
0
1
-
4113D–8051–01/09
DPS
0