AT90PWM161 Atmel Corporation, AT90PWM161 Datasheet - Page 247

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AT90PWM161

Manufacturer Part Number
AT90PWM161
Description
Manufacturer
Atmel Corporation
Datasheet

Specifications of AT90PWM161

Flash (kbytes)
16 Kbytes
Pin Count
20
Max. Operating Frequency
16 MHz
Cpu
8-bit AVR
Hardware Qtouch Acquisition
No
Max I/o Pins
20
Ext Interrupts
3
Usb Speed
No
Usb Interface
No
Spi
1
Graphic Lcd
No
Video Decoder
No
Camera Interface
No
Adc Channels
11
Adc Resolution (bits)
10
Adc Speed (ksps)
125
Analog Comparators
3
Resistive Touch Screen
No
Dac Channels
1
Dac Resolution (bits)
10
Temp. Sensor
Yes
Crypto Engine
No
Sram (kbytes)
0.25
Eeprom (bytes)
512
Self Program Memory
YES
Dram Memory
No
Nand Interface
No
Picopower
No
Temp. Range (deg C)
-40 to 125
I/o Supply Class
2.7 to 5.5
Operating Voltage (vcc)
2.7 to 5.5
Fpu
No
Mpu / Mmu
no / no
Timers
1
Output Compare Channels
8
Input Capture Channels
1
Pwm Channels
6
32khz Rtc
No
Calibrated Rc Oscillator
Yes

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21. Memory Programming
21.1
7734P–AVR–08/10
Program And Data Memory Lock Bits
For details about these two section, see
“RWW – Read-While-Write Section” on page 234
Table 20-9.
Note:
The AT90PWM81 provides six Lock bits which can be left unprogrammed (“1”) or can be programmed
(“0”) to obtain the additional features listed in
the Chip Erase command.
Table 21-1.
Variable
PCMSB
PAGEMSB
ZPCMSB
ZPAGEMSB
PCPAGE
PCWORD
BLB12
BLB11
BLB02
BLB01
LB2
LB1
Lock Bit Byte
1. Z15:Z13: always ignored
Z0: should be zero for all SPM commands, byte select for the LPM instruction.
See
pointer during Self-Programming.
Explanation of Different Variables used in
Lock Bit Byte
“Addressing the Flash During Self-Programming” on page 239
PC[11:5]
PC[4:0]
11
4
(1)
Corresponding
Bit No
Z-value
7
6
5
4
3
2
1
0
Z12:Z6
Z5:Z1
Z12
Z5
“NRWW – No Read-While-Write Section” on page 234
(1)
Description
Boot Lock bit
Boot Lock bit
Boot Lock bit
Boot Lock bit
Lock bit
Lock bit
Table
Description
Most significant bit in the Program Counter. (The
Program Counter is 12 bits PC[11:0])
Most significant bit which is used to address the words
within one page (32 words in a page requires 5 bits PC
[4:0]).
Bit in Z-register that is mapped to PCMSB. Because Z0 is
not used, the ZPCMSB equals PCMSB + 1.
Bit in Z-register that is mapped to PAGEMSB. Because
Z0 is not used, the ZPAGEMSB equals PAGEMSB + 1.
Program counter page address: Page select, for page erase
and page write
Program counter word address: Word select, for filling
temporary buffer (must be zero during page write
operation)
21-2. The Lock bits can only be erased to “1” with
Figure 20-3
Default Value
1 (unprogrammed)
1 (unprogrammed)
1 (unprogrammed)
1 (unprogrammed)
1 (unprogrammed)
1 (unprogrammed)
1 (unprogrammed)
1 (unprogrammed)
and the Mapping to the Z-pointer
for details about the use of Z-
AT90PWM81
247
and

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