AT90PWM2B Atmel Corporation, AT90PWM2B Datasheet - Page 260
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AT90PWM2B
Manufacturer Part Number
AT90PWM2B
Description
Manufacturer
Atmel Corporation
Specifications of AT90PWM2B
Flash (kbytes)
8 Kbytes
Pin Count
24
Max. Operating Frequency
16 MHz
Cpu
8-bit AVR
# Of Touch Channels
8
Hardware Qtouch Acquisition
No
Max I/o Pins
19
Ext Interrupts
4
Usb Speed
No
Usb Interface
No
Spi
1
Uart
1
Graphic Lcd
No
Video Decoder
No
Camera Interface
No
Adc Channels
8
Adc Resolution (bits)
10
Adc Speed (ksps)
125
Analog Comparators
2
Resistive Touch Screen
No
Dac Channels
1
Dac Resolution (bits)
10
Temp. Sensor
No
Crypto Engine
No
Sram (kbytes)
0.5
Eeprom (bytes)
512
Self Program Memory
YES
Dram Memory
No
Nand Interface
No
Picopower
No
Temp. Range (deg C)
-40 to 105
I/o Supply Class
2.7 to 5.5
Operating Voltage (vcc)
2.7 to 5.5
Fpu
No
Mpu / Mmu
no / no
Timers
4
Output Compare Channels
12
Input Capture Channels
1
Pwm Channels
7
32khz Rtc
No
Calibrated Rc Oscillator
Yes
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Part Number:
AT90PWM2B-16SU
Manufacturer:
ATMEL/爱特梅尔
Quantity:
20 000
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22.3.1
22.4
22.4.1
260
DAC Register Description
AT90PWM2/3/2B/3B
DAC Voltage Reference
Digital to Analog Conversion Control Register – DACON
rupt Enable bit in SREG is cleared. A conversion can thus be triggered without causing an
interrupt. However, the interrupt flag must be cleared in order to trigger a new conversion at the
next interrupt event.
The reference voltage for the ADC (V
be selected as either AV
AV
ated from the internal bandgap reference (V
external AREF pin is directly connected to the DAC, and the reference voltage can be made
more immune to noise by connecting a capacitor between the AREF pin and ground. V
also be measured at the AREF pin with a high impedant voltmeter. Note that V
impedant source, and only a capacitive load should be connected in a system.
If the user has a fixed voltage source connected to the AREF pin, the user may not use the other
reference voltage options in the application, as they will be shorted to the external voltage. If no
external voltage is applied to the AREF pin, the user may switch between AV
reference selection. The first DAC conversion result after switching reference voltage source
may be inaccurate, and the user is advised to discard this result.
The DAC is controlled via three dedicated registers:
•
•
• Bit 7 – DAATE: DAC Auto Trigger Enable bit
Set this bit to update the DAC input value on the positive edge of the trigger signal selected with
the DACTS2-0 bit in DACON register.
Clear it to automatically update the DAC input when a value is written on DACH register.
• Bit 6:4 – DATS2, DATS1, DATS0: DAC Trigger Selection bits
These bits are only necessary in case the DAC works in auto trigger mode. It means if DAATE
bit is set.
In accordance with the
update of the DAC input values. The update will be generated by the rising edge of the selected
interrupt flag whether the interrupt is enabled or not.
Table 22-1.
Bit
Read/Write
Initial Value
DATS2
0
0
0
0
CC
The DACON register which is used for DAC configuration
DACH and DACL which are used to set the value to be converted.
is connected to the DAC through a passive switch. The internal 2.56V reference is gener-
DATS1
0
0
1
1
DAC Auto Trigger source selection
DAATE
R/W
7
0
Table
CC
DATS2
R/W
DATS0
0
1
0
1
6
0
, internal 2.56V reference, or external AREF pin.
22-1, these 3 bits select the interrupt event which will generate the
DATS1
R/W
5
0
REF
Description
Analog comparator 0
Analog comparator 1
External Interrupt Request 0
Timer/Counter0 Compare Match
) indicates the conversion range for the DAC. V
DATS0
R/W
BG
4
0
) through an internal amplifier. In either case, the
3
0
-
-
DALA
R/W
2
0
DAOE
R/W
1
0
DAEN
CC
R/W
0
0
and 2.56V as
4317J–AVR–08/10
REF
DACON
is a high
REF
REF
can
can
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