AT90PWM2B Atmel Corporation, AT90PWM2B Datasheet - Page 53
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AT90PWM2B
Manufacturer Part Number
AT90PWM2B
Description
Manufacturer
Atmel Corporation
Specifications of AT90PWM2B
Flash (kbytes)
8 Kbytes
Pin Count
24
Max. Operating Frequency
16 MHz
Cpu
8-bit AVR
# Of Touch Channels
8
Hardware Qtouch Acquisition
No
Max I/o Pins
19
Ext Interrupts
4
Usb Speed
No
Usb Interface
No
Spi
1
Uart
1
Graphic Lcd
No
Video Decoder
No
Camera Interface
No
Adc Channels
8
Adc Resolution (bits)
10
Adc Speed (ksps)
125
Analog Comparators
2
Resistive Touch Screen
No
Dac Channels
1
Dac Resolution (bits)
10
Temp. Sensor
No
Crypto Engine
No
Sram (kbytes)
0.5
Eeprom (bytes)
512
Self Program Memory
YES
Dram Memory
No
Nand Interface
No
Picopower
No
Temp. Range (deg C)
-40 to 105
I/o Supply Class
2.7 to 5.5
Operating Voltage (vcc)
2.7 to 5.5
Fpu
No
Mpu / Mmu
no / no
Timers
4
Output Compare Channels
12
Input Capture Channels
1
Pwm Channels
7
32khz Rtc
No
Calibrated Rc Oscillator
Yes
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Part Number:
AT90PWM2B-16SU
Manufacturer:
ATMEL/爱特梅尔
Quantity:
20 000
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9.2.1
4317J–AVR–08/10
Watchdog Timer Control Register - WDTCSR
The following code example shows one assembly and one C function for changing the time-out
value of the Watchdog Timer.
Note:
Note: The Watchdog Timer should be reset before any change of the WDP bits, since a change
in the WDP bits can result in a time-out when switching to a shorter time-out period;
• Bit 7 - WDIF: Watchdog Interrupt Flag
This bit is set when a time-out occurs in the Watchdog Timer and the Watchdog Timer is config-
ured for interrupt. WDIF is cleared by hardware when executing the corresponding interrupt
handling vector. Alternatively, WDIF is cleared by writing a logic one to the flag. When the I-bit in
SREG and WDIE are set, the Watchdog Time-out Interrupt is executed.
Bit
Read/Write
Initial Value
Assembly Code Example
C Code Example
WDT_Prescaler_Change:
void WDT_Prescaler_Change(void)
{
}
; Turn off global interrupt
cli
; Reset Watchdog Timer
wdr
; Start timed sequence
lds r16, WDTCSR
ori
sts WDTCSR, r16
; --
; Set new prescaler(time-out) value = 64K cycles (~0.5 s)
ldi
sts WDTCSR, r16
; --
; Turn on global interrupt
sei
ret
__disable_interrupt();
__watchdog_reset();
/* Start timed
WDTCSR |= (1<<WDCE) | (1<<WDE);
/* Set new prescaler(time-out) value = 64K cycles (~0.5 s) */
WDTCSR
__enable_interrupt();
1. The example code assumes that the part specific header file is included.
r16, (1<<WDCE) | (1<<WDE)
Got four cycles to set the new values from here -
r16, (1<<WDE) | (1<<WDP2) | (1<<WDP0)
Finished setting new values, used 2 cycles -
WDIF
R/W
= (1<<WDE) | (1<<WDP2) | (1<<WDP0);
7
0
(1)
WDIE
R/W
6
0
(1)
equence */
WDP3
R/W
5
0
WDCE
R/W
4
0
WDE
R/W
X
3
AT90PWM2/3/2B/3B
WDP2
R/W
2
0
WDP1
R/W
1
0
WDP0
R/W
0
0
WDTCSR
53
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