ATmega1284P Atmel Corporation, ATmega1284P Datasheet - Page 223

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ATmega1284P

Manufacturer Part Number
ATmega1284P
Description
Manufacturer
Atmel Corporation
Datasheets

Specifications of ATmega1284P

Flash (kbytes)
128 Kbytes
Pin Count
44
Max. Operating Frequency
20 MHz
Cpu
8-bit AVR
# Of Touch Channels
16
Hardware Qtouch Acquisition
No
Max I/o Pins
32
Ext Interrupts
32
Usb Speed
No
Usb Interface
No
Spi
3
Twi (i2c)
1
Uart
2
Graphic Lcd
No
Video Decoder
No
Camera Interface
No
Adc Channels
8
Adc Resolution (bits)
10
Adc Speed (ksps)
15
Analog Comparators
1
Resistive Touch Screen
No
Temp. Sensor
No
Crypto Engine
No
Sram (kbytes)
16
Eeprom (bytes)
4096
Self Program Memory
YES
Dram Memory
No
Nand Interface
No
Picopower
Yes
Temp. Range (deg C)
-40 to 85
I/o Supply Class
1.8 to 5.5
Operating Voltage (vcc)
1.8 to 5.5
Fpu
No
Mpu / Mmu
no / no
Timers
3
Output Compare Channels
6
Input Capture Channels
1
Pwm Channels
6
32khz Rtc
Yes
Calibrated Rc Oscillator
Yes

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Table 21-2.
8272C–AVR–06/11
Status Code
(TWSR)
Prescaler Bits
are 0
0x08
0x10
0x18
0x20
0x28
0x30
0x38
Status of the 2-wire Serial Bus
and 2-wire Serial Interface Hard-
ware
A START condition has been
transmitted
A repeated START condition
has been transmitted
SLA+W has been transmitted;
ACK has been received
SLA+W has been transmitted;
NOT ACK has been received
Data byte has been transmitted;
ACK has been received
Data byte has been transmitted;
NOT ACK has been received
Arbitration lost in SLA+W or data
bytes
Status codes for Master Transmitter Mode
After a repeated START condition (state 0x10) the 2-wire Serial Interface can access the same
Slave again, or a new Slave without transmitting a STOP condition. Repeated START enables
the Master to switch between Slaves, Master Transmitter mode and Master Receiver mode with-
out losing control of the bus.
To/from TWDR
Load SLA+W
Load SLA+W or
Load SLA+R
Load data byte or
No TWDR action or
No TWDR action or
No TWDR action
Load data byte or
No TWDR action or
No TWDR action or
No TWDR action
Load data byte or
No TWDR action or
No TWDR action or
No TWDR action
Load data byte or
No TWDR action or
No TWDR action or
No TWDR action
No TWDR action or
No TWDR action
ATmega164A/PA/324A/PA/644A/PA/1284/P
Application Software Response
STA
0
0
0
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
STO
0
0
0
0
0
1
1
0
0
1
1
0
0
1
1
0
0
1
1
0
0
To TWCR
TWINT
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
TWEA
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
Next Action Taken by TWI Hardware
SLA+W will be transmitted;
ACK or NOT ACK will be received
SLA+W will be transmitted;
ACK or NOT ACK will be received
SLA+R will be transmitted;
Logic will switch to Master Receiver mode
Data byte will be transmitted and ACK or NOT ACK will
be received
Repeated START will be transmitted
STOP condition will be transmitted and
TWSTO Flag will be reset
STOP condition followed by a START condition will be
transmitted and TWSTO Flag will be reset
Data byte will be transmitted and ACK or NOT ACK will
be received
Repeated START will be transmitted
STOP condition will be transmitted and
TWSTO Flag will be reset
STOP condition followed by a START condition will be
transmitted and TWSTO Flag will be reset
Data byte will be transmitted and ACK or NOT ACK will
be received
Repeated START will be transmitted
STOP condition will be transmitted and
TWSTO Flag will be reset
STOP condition followed by a START condition will be
transmitted and TWSTO Flag will be reset
Data byte will be transmitted and ACK or NOT ACK will
be received
Repeated START will be transmitted
STOP condition will be transmitted and
TWSTO Flag will be reset
STOP condition followed by a START condition will be
transmitted and TWSTO Flag will be reset
2-wire Serial Bus will be released and not addressed
Slave mode entered
A START condition will be transmitted when the bus be-
comes free
223

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