ATmega169P Atmel Corporation, ATmega169P Datasheet - Page 250

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ATmega169P

Manufacturer Part Number
ATmega169P
Description
Manufacturer
Atmel Corporation
Datasheets

Specifications of ATmega169P

Flash (kbytes)
16 Kbytes
Pin Count
64
Max. Operating Frequency
16 MHz
Cpu
8-bit AVR
# Of Touch Channels
16
Hardware Qtouch Acquisition
No
Max I/o Pins
54
Ext Interrupts
17
Usb Speed
No
Usb Interface
No
Spi
2
Twi (i2c)
1
Uart
1
Segment Lcd
100
Graphic Lcd
No
Video Decoder
No
Camera Interface
No
Adc Channels
8
Adc Resolution (bits)
10
Adc Speed (ksps)
15
Analog Comparators
1
Resistive Touch Screen
No
Temp. Sensor
No
Crypto Engine
No
Sram (kbytes)
1
Eeprom (bytes)
512
Self Program Memory
YES
Dram Memory
No
Nand Interface
No
Picopower
Yes
Temp. Range (deg C)
-40 to 85
I/o Supply Class
1.8 to 5.5
Operating Voltage (vcc)
1.8 to 5.5
Fpu
No
Mpu / Mmu
no / no
Timers
3
Output Compare Channels
4
Input Capture Channels
1
Pwm Channels
4
32khz Rtc
Yes
Calibrated Rc Oscillator
Yes

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23.5.4
8018P–AVR–08/10
LCDCCR – LCD Contrast Control Register
• Bits 7:5 – LCDDC2:0: LDC Display Configuration
The LCDDC2:0 bits determine the amount of time the LCD drivers are turned on for each volt-
age transition on segment and common pins. A short drive time will lead to lower power
consumption, but displays with high internal resistance may need longer drive time to achieve
satisfactory contrast. Note that the drive time will never be longer than one half prescaled LCD
clock period, even if the selected drive time is longer. When using static bias or blanking, drive
time will always be one half prescaled LCD clock period.
Table 23-7.
• Bit 4 – LCDMDT: LCD Maximum Drive Time
Writing this bit to one turns the LCD drivers on 100% on the time, regardless of the drive time
configured by LCDDC2:0.
• Bits 3:0 – LCDCC3:0: LCD Contrast Control
The LCDCC3:0 bits determine the maximum voltage V
different selections are shown in
ning of a new frame.
Bit
(0xE7)
Read/Write
Initial Value
LCDDC2
0
0
0
0
1
1
1
1
LCDDC2
R/W
LCD Display Configuration
7
0
LCDDC1
R/W
6
0
LCDDC1
0
0
1
1
0
0
1
1
LCDDC0
R/W
Table 23-8 on page
5
0
LCDMDT
R/W
4
0
LCDDC0
LCDCC3
0
1
0
1
0
1
0
1
R/W
3
0
251. New values take effect every begin-
LCD
on segment and common pins. The
LCDCC2
R/W
2
0
Nominal drive time
300 µs
70 µs
150 µs
450 µs
575 µs
850 µs
1150 µs
50% of clk
LCDCC1
ATmega169P
R/W
1
0
LCD_PS
LCDCC0
R/W
0
0
LCDCCR
250

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