ATmega16A Atmel Corporation, ATmega16A Datasheet - Page 117

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ATmega16A

Manufacturer Part Number
ATmega16A
Description
Manufacturer
Atmel Corporation
Datasheets

Specifications of ATmega16A

Flash (kbytes)
16 Kbytes
Pin Count
44
Max. Operating Frequency
16 MHz
Cpu
8-bit AVR
# Of Touch Channels
16
Hardware Qtouch Acquisition
No
Max I/o Pins
32
Ext Interrupts
3
Usb Speed
No
Usb Interface
No
Spi
1
Twi (i2c)
1
Uart
1
Graphic Lcd
No
Video Decoder
No
Camera Interface
No
Adc Channels
8
Adc Resolution (bits)
10
Adc Speed (ksps)
15
Analog Comparators
1
Resistive Touch Screen
No
Temp. Sensor
No
Crypto Engine
No
Sram (kbytes)
1
Eeprom (bytes)
512
Self Program Memory
YES
Dram Memory
No
Nand Interface
No
Picopower
No
Temp. Range (deg C)
-40 to 85
I/o Supply Class
2.7 to 5.5
Operating Voltage (vcc)
2.7 to 5.5
Fpu
No
Mpu / Mmu
no / no
Timers
3
Output Compare Channels
4
Input Capture Channels
1
Pwm Channels
4
32khz Rtc
Yes
Calibrated Rc Oscillator
Yes

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17. 8-bit Timer/Counter2 with PWM and Asynchronous Operation
17.1
17.2
17.2.1
8154B–AVR–07/09
Features
Overview
Registers
Timer/Counter2 is a general purpose, single compare unit, 8-bit Timer/Counter module. A simpli-
fied block diagram of the 8-bit Timer/Counter is shown in
of I/O pins, refer to
bits and I/O pins, are shown in bold. The device-specific I/O Register and bit locations are listed
in the
Figure 17-1. 8-bit Timer/Counter Block Diagram
The Timer/Counter (TCNT2) and Output Compare Register (OCR2) are 8-bit registers. Interrupt
request (shorten as Int.Req.) signals are all visible in the Timer Interrupt Flag Register (TIFR).
All interrupts are individually masked with the Timer Interrupt Mask Register (TIMSK). TIFR and
TIMSK are not shown in the figure since these registers are shared by other timer units.
Single Compare unit Counter
Clear Timer on Compare Match (Auto Reload)
Glitch-free, Phase Correct Pulse Width Modulator (PWM)
Frequency Generator
10-bit Clock Prescaler
Overflow and Compare Match Interrupt Sources (TOV2 and OCF2)
Allows clocking from External 32 kHz Watch Crystal Independent of the I/O Clock
“Register Description” on page
Status flags
Timer/Counter
TCNTn
OCRn
“Pinout ATmega16A” on page
=
ASSRn
direction
count
clear
BOTTOM
Synchronized Status flags
= 0
130.
Control Logic
=
TCCRn
TOP
asynchronous mode
0xFF
select (ASn)
2. CPU accessible I/O Registers, including I/O
clk
Tn
Synchronization Unit
OCn
(Int.Req.)
Generation
Prescaler
Waveform
Figure
17-1. For the actual placement
ATmega16A
Oscillator
T/C
clk
TOVn
(Int.Req.)
clk
clk
OCn
ASY
I/O
I/O
TOSC1
TOSC2
117

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