ATmega16A Atmel Corporation, ATmega16A Datasheet - Page 38

• Manufacturer Part Number: ATmega16A
• Manufacturer: Atmel Corporation

Specifications of ATmega16A

• Flash (kbytes): 16 Kbytes
• Pin Count: 44
• Max. Operating Frequency: 16 MHz
• Cpu: 8-bit AVR
• # Of Touch Channels: 16
• Hardware Qtouch Acquisition: No
• Max I/o Pins: 32
• Ext Interrupts: 3
• Usb Speed: No
• Usb Interface: No
• Spi: 1
• Twi (i2c): 1
• Uart: 1
• Graphic Lcd: No
• Video Decoder: No
• Camera Interface: No
• Adc Channels: 8
• Adc Resolution (bits): 10
• Adc Speed (ksps): 15
• Analog Comparators: 1
• Resistive Touch Screen: No
• Temp. Sensor: No
• Crypto Engine: No
• Sram (kbytes): 1
• Eeprom (bytes): 512
• Self Program Memory: YES
• Dram Memory: No
• Nand Interface: No
• Picopower: No
• Temp. Range (deg C): -40 to 85
• I/o Supply Class: 2.7 to 5.5
• Operating Voltage (vcc): 2.7 to 5.5
• Fpu: No
• Mpu / Mmu: no / no
• Timers: 3
• Output Compare Channels: 4
• Input Capture Channels: 1
• Pwm Channels: 4
• 32khz Rtc: Yes
• Calibrated Rc Oscillator: Yes

10.1.2
38
ATmega16A
Power-on Reset
Figure 10-1. Reset Logic
A Power-on Reset (POR) pulse is generated by an On-chip detection circuit. The detection level
is defined in
V
well as to detect a failure in supply voltage.
A Power-on Reset (POR) circuit ensures that the device is reset from Power-on. Reaching the
Power-on Reset threshold voltage invokes the delay counter, which determines how long the
device is kept in RESET after V
when V
Figure 10-2. MCU Start-up, RESET Tied to V
CC
is below the detection level. The POR circuit can be used to trigger the Start-up Reset, as
CC
INTERNAL
TIME-OUT
decreases below the detection level.
RESET
RESET
V
“System and Reset Characteristics” on page
CC
BODLEVEL
BODEN
JTAG Reset
Pull-up Resistor
Register
FILTER
SPIKE
V
V
POT
RST
CC
t
rise. The RESET signal is activated again, without any delay,
CKSEL[3:0]
TOUT
Reset Circuit
Reset Circuit
SUT[1:0]
Reset Circuit
Brown-out
Watchdog
Watchdog
Oscillator
Generator
Power-on
Timer
Clock
CK
MCU Control and Status
Register (MCUCSR)
CC
DATA BUS
.
Delay Counters
296. The POR is activated whenever
TIMEOUT
8154B–AVR–07/09