ATmega32M1 Atmel Corporation, ATmega32M1 Datasheet - Page 260

• Manufacturer Part Number: ATmega32M1
• Manufacturer: Atmel Corporation

Specifications of ATmega32M1

• Flash (kbytes): 32 Kbytes
• Pin Count: 32
• Max. Operating Frequency: 16 MHz
• Cpu: 8-bit AVR
• # Of Touch Channels: 12
• Hardware Qtouch Acquisition: No
• Max I/o Pins: 27
• Ext Interrupts: 27
• Usb Speed: No
• Usb Interface: No
• Spi: 1
• Uart: 1
• Can: 1
• Lin: 1
• Graphic Lcd: No
• Video Decoder: No
• Camera Interface: No
• Adc Channels: 11
• Adc Resolution (bits): 10
• Adc Speed (ksps): 125
• Analog Comparators: 4
• Resistive Touch Screen: No
• Dac Channels: 1
• Dac Resolution (bits): 10
• Temp. Sensor: Yes
• Crypto Engine: No
• Sram (kbytes): 2
• Eeprom (bytes): 1024
• Self Program Memory: YES
• Dram Memory: No
• Nand Interface: No
• Picopower: No
• Temp. Range (deg C): -40 to 85
• I/o Supply Class: 2.7 to 5.5
• Operating Voltage (vcc): 2.7 to 5.5
• Fpu: No
• Mpu / Mmu: no / no
• Timers: 2
• Output Compare Channels: 14
• Input Capture Channels: 1
• Pwm Channels: 10
• 32khz Rtc: No
• Calibrated Rc Oscillator: Yes

23.4.5
260
ATmega16M1/32M1/64M1
ACSR – Analog Comparator Status Register
Table 23-7.
• Bit 3 – Res: Reserved
This bit isreserved and will always read as zero.
• Bit 2:0 – AC3M[2:0]: Analog Comparator 3 Multiplexer register
These 3 bits determine the input of the negative input of the analog comparator.
The different setting are shown in
Table 23-8.
Bit
Read/Write
Initial Value
• Bit 7 – AC3IF: Analog Comparator 3 Interrupt Flag Bit
This bit is set by hardware when comparator 3 output event triggers off the interrupt mode
defined by AC3IS1 and AC3IS0 bits in AC2CON register.
This bit is cleared by hardware when the corresponding interrupt vector is executed in case the
AC3IE in AC3CON register is set. Anyway, this bit is cleared by writing a logical one on it.
This bit can also be used to synchronize ADC or DAC conversions.
• Bit 6 – AC2IF: Analog Comparator 2 Interrupt Flag Bit
This bit is set by hardware when comparator 2 output event triggers off the interrupt mode
defined by AC2IS1 and AC2IS0 bits in AC2CON register.
This bit is cleared by hardware when the corresponding interrupt vector is executed in case the
AC2IE in AC2CON register is set. Anyway, this bit is cleared by writing a logical one on it.
This bit can also be used to synchronize ADC or DAC conversions.
AC3IS[1:0]
AC3M[2:0]
00
01
10
11
000
001
010
011
100
101
110
111
Interrupt sensitivity selection
Analog Comparator 3 negative input selection
AC3IF
R/W
7
0
AC2IF
R/W
6
0
AC1IF
Table
R/W
Analog Comparator Negative Input (ACMPM pin)
5
0
Comparator interrupt on output falling edge
Comparator interrupt on output rising edge
Comparator Interrupt on output toggle
23-8.
AC0IF
R/W
4
0
Description
Bandgap (1.1V)
Reserved
Description
AC3O
“Vref”/6.40
“Vref”/3.20
“Vref”/2.13
“Vref”/1.60
DAC result
Reserved
R
3
0
AC2O
R
2
0
AC1O
R
1
0
AC0O
R
0
0
8209D–AVR–11/10
ACSR