ATmega6490 Atmel Corporation, ATmega6490 Datasheet - Page 243
ATmega6490
Manufacturer Part Number
ATmega6490
Description
Manufacturer
Atmel Corporation
Specifications of ATmega6490
Flash (kbytes)
64 Kbytes
Pin Count
100
Max. Operating Frequency
16 MHz
Cpu
8-bit AVR
# Of Touch Channels
16
Hardware Qtouch Acquisition
No
Max I/o Pins
69
Ext Interrupts
32
Usb Speed
No
Usb Interface
No
Spi
2
Twi (i2c)
1
Uart
1
Segment Lcd
160
Graphic Lcd
No
Video Decoder
No
Camera Interface
No
Adc Channels
8
Adc Resolution (bits)
10
Adc Speed (ksps)
15
Analog Comparators
1
Resistive Touch Screen
No
Temp. Sensor
No
Crypto Engine
No
Sram (kbytes)
4
Eeprom (bytes)
2048
Self Program Memory
YES
Dram Memory
No
Nand Interface
No
Picopower
No
Temp. Range (deg C)
-40 to 85
I/o Supply Class
1.8 to 5.5
Operating Voltage (vcc)
1.8 to 5.5
Fpu
No
Mpu / Mmu
no / no
Timers
3
Output Compare Channels
4
Input Capture Channels
1
Pwm Channels
4
32khz Rtc
Yes
Calibrated Rc Oscillator
Yes
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23.4.4
2552K–AVR–04/11
LCDCCR – LCD Contrast Control Register
• Bits 7:5 – LCDDC2:0: LDC Display Configuration
The LCDDC2:0 bits determine the amount of time the LCD drivers are turned on for each volt-
age transition on segment and common pins. A short drive time will lead to lower power
consumption, but displays with high internal resistance may need longer drive time to achieve
satisfactory contrast. Note that the drive time will never be longer than one half prescaled LCD
clock period, even if the selected drive time is longer. When using static duty or blanking, drive
time will always be one half prescaled LCD clock period.
New values take effect immediately, and can cause small glitches in the display output. This can
be avoided by setting the LCDBL in LCDCRA, and wait to the next start of frame before chang-
ing LCDDC2:0.
Table 23-7.
Note:
• Bit 4 – Reserved Bit
This bit is reserved in the ATmega329/3290/649/6490 and will always read as zero.
• Bits 3:0 – LCDCC3:0: LCD Contrast Control
The LCDCC3:0 bits determine the maximum voltage V
different selections are shown in
frame.
Table 23-8.
Bit
(0xE7)
Read/Write
Initial Value
LCDCC3
LCDDC2
0
0
0
0
The drive time will be longer dependent on oscillator startup time.
0
0
0
0
1
1
1
1
LCDDC2
R/W
7
0
LCD Display Configuration
LCD Contrast Control
LCDCC2
LCDDC1
0
0
0
0
R/W
6
0
LCDDC1
0
0
1
1
0
0
1
1
LCDDC0
R/W
5
0
LCDCC1
Table
0
0
1
1
R
4
0
23-8. New values take effect every beginning of a new
–
LCDDC0
ATmega329/3290/649/6490
LCDCC3
LCDCC0
0
1
0
1
0
1
0
1
R/W
3
0
0
1
0
1
LCDCC2
LCD
R/W
2
0
on segment and common pins. The
Maximum Voltage V
Nominal drive time
300µs
70µs
150µs
450µs
575µs
850µs
1150µs
50% of clk
LCDCC1
R/W
0
1
2.60
2.65
2.70
2.75
LCDCC0
LCD_PS
R/W
0
0
LCDCCR
LCD
243
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