ATmega6490 Atmel Corporation, ATmega6490 Datasheet - Page 35
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ATmega6490
Manufacturer Part Number
ATmega6490
Description
Manufacturer
Atmel Corporation
Specifications of ATmega6490
Flash (kbytes)
64 Kbytes
Pin Count
100
Max. Operating Frequency
16 MHz
Cpu
8-bit AVR
# Of Touch Channels
16
Hardware Qtouch Acquisition
No
Max I/o Pins
69
Ext Interrupts
32
Usb Speed
No
Usb Interface
No
Spi
2
Twi (i2c)
1
Uart
1
Segment Lcd
160
Graphic Lcd
No
Video Decoder
No
Camera Interface
No
Adc Channels
8
Adc Resolution (bits)
10
Adc Speed (ksps)
15
Analog Comparators
1
Resistive Touch Screen
No
Temp. Sensor
No
Crypto Engine
No
Sram (kbytes)
4
Eeprom (bytes)
2048
Self Program Memory
YES
Dram Memory
No
Nand Interface
No
Picopower
No
Temp. Range (deg C)
-40 to 85
I/o Supply Class
1.8 to 5.5
Operating Voltage (vcc)
1.8 to 5.5
Fpu
No
Mpu / Mmu
no / no
Timers
3
Output Compare Channels
4
Input Capture Channels
1
Pwm Channels
4
32khz Rtc
Yes
Calibrated Rc Oscillator
Yes
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9. Power Management and Sleep Modes
Table 9-1.
Notes:
2552K–AVR–04/11
Sleep
Mode
Idle
ADC
Noise
Reduction
Power-
down
Power-
save
Standby
1. Only recommended with external crystal or resonator selected as clock source.
2. If either LCD controller or Timer/Counter2 is running in asynchronous mode.
3. For INT0, only level interrupt
(1)
Active Clock Domains and Wake-up Sources in the Different Sleep Modes.
Active Clock Domains
Sleep modes enable the application to shut down unused modules in the MCU, thereby saving
power. The AVR provides various sleep modes allowing the user to tailor the power consump-
tion to the application’s requirements.
To enter any of the five sleep modes, the SE bit in SMCR must be written to logic one and a
SLEEP instruction must be executed, see
The SM2, SM1, and SM0 bits in the SMCR Register select which sleep mode (Idle, ADC Noise
Reduction, Power-down, Power-save, or Standby) will be activated by the SLEEP instruction.
See
sleep mode, the MCU wakes up. The MCU is then halted for four cycles in addition to the start-
up time, executes the interrupt routine, and resumes execution from the instruction following
SLEEP. The contents of the Register File and SRAM are unaltered when the device wakes up
from sleep. If a reset occurs during sleep mode, the MCU wakes up and executes from the
Reset Vector.
Figure 8-1 on page 26
and their distribution. The figure is helpful in selecting an appropriate sleep mode.
X
Table 9-1 on page 35
X
X
X
X
X
presents the different clock systems in the ATmega329/3290/649/6490,
Oscillators
X
X
X
for a summary. If an enabled interrupt occurs while the MCU is in a
X
X
X
(2)
(2)
(2)
X
X
X
X
“SMCR – Sleep Mode Control Register” on page
X
(3)
(3)
(3)
(3)
ATmega329/3290/649/6490
X
X
X
X
X
Wake-up Sources
X
X
X
(2)
X
X
X
(2)
X
X
X
X
X
39.
35
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