ATmega64M1 Automotive Atmel Corporation, ATmega64M1 Automotive Datasheet - Page 105

• Manufacturer Part Number: ATmega64M1 Automotive
• Manufacturer: Atmel Corporation

Specifications of ATmega64M1 Automotive

• Flash (kbytes): 64 Kbytes
• Pin Count: 32
• Max. Operating Frequency: 16 MHz
• Cpu: 8-bit AVR
• # Of Touch Channels: 12
• Hardware Qtouch Acquisition: No
• Max I/o Pins: 27
• Ext Interrupts: 27
• Usb Speed: No
• Usb Interface: No
• Spi: 1
• Uart: 1
• Can: 1
• Lin: 1
• Graphic Lcd: No
• Video Decoder: No
• Camera Interface: No
• Adc Channels: 11
• Adc Resolution (bits): 10
• Adc Speed (ksps): 125
• Analog Comparators: 4
• Resistive Touch Screen: No
• Dac Channels: 1
• Dac Resolution (bits): 10
• Temp. Sensor: Yes
• Crypto Engine: No
• Sram (kbytes): 4
• Eeprom (bytes): 2048
• Self Program Memory: YES
• Dram Memory: No
• Nand Interface: No
• Picopower: No
• Temp. Range (deg C): -40 to 150
• I/o Supply Class: 2.7 to 5.5
• Operating Voltage (vcc): 2.7 to 5.5
• Fpu: No
• Mpu / Mmu: no / no
• Timers: 2
• Output Compare Channels: 14
• Input Capture Channels: 1
• Pwm Channels: 10
• 32khz Rtc: No
• Calibrated Rc Oscillator: Yes

12.8.3
12.8.4
12.8.5
12.8.6
7647G–AVR–09/11
Timer/Counter Register – TCNT0
Output Compare Register A – OCR0A
Output Compare Register B – OCR0B
Timer/Counter Interrupt Mask Register – TIMSK0
If external pin modes are used for the Timer/Counter0, transitions on the T0 pin will clock the
counter even if the pin is configured as an output. This feature allows software control of the
counting.
The Timer/Counter Register gives direct access, both for read and write operations, to the
Timer/Counter unit 8-bit counter. Writing to the TCNT0 Register blocks (removes) the Com-
pare Match on the following timer clock. Modifying the counter (TCNT0) while the counter is
running, introduces a risk of missing a Compare Match between TCNT0 and the OCR0x
Registers.
The Output Compare Register A contains an 8-bit value that is continuously compared with
the counter value (TCNT0). A match can be used to generate an Output Compare interrupt, or
to generate a waveform output on the OC0A pin.
The Output Compare Register B contains an 8-bit value that is continuously compared with
the counter value (TCNT0). A match can be used to generate an Output Compare interrupt, or
to generate a waveform output on the OC0B pin.
• Bits 7..3 – Res: Reserved Bits
These bits are reserved bits in the ATmega16/32/64/M1/C1 and will always read as zero.
• Bit 2 – OCIE0B: Timer/Counter Output Compare Match B Interrupt Enable
When the OCIE0B bit is written to one, and the I-bit in the Status Register is set, the
Timer/Counter Compare Match B interrupt is enabled. The corresponding interrupt is executed
if a Compare Match in Timer/Counter occurs, i.e., when the OCF0B bit is set in the
Timer/Counter Interrupt Flag Register – TIFR0.
Bit
Read/Write
Initial Value
Bit
Read/Write
Initial Value
Bit
Read/Write
Initial Value
Bit
Read/Write
Initial Value
R/W
R/W
R/W
R
7
0
7
0
7
0
7
–
0
R/W
R/W
R/W
R
6
–
0
6
0
6
0
6
0
R/W
R/W
R/W
R
5
–
0
5
0
5
0
5
0
Atmel ATmega16/32/64/M1/C1
R/W
R/W
R/W
R
4
–
0
4
0
4
0
4
0
OCR0A[7:0]
OCR0B[7:0]
TCNT0[7:0]
R/W
R/W
R/W
R
3
–
0
3
0
3
0
3
0
OCIE0B
R/W
R/W
R/W
R/W
2
0
2
0
2
0
2
0
OCIE0A
R/W
R/W
R/W
R/W
1
0
1
0
1
0
1
0
TOIE0
R/W
R/W
R/W
R/W
0
0
0
0
0
0
0
0
OCR0B
OCR0A
TIMSK0
TCNT0
105