ATmega64M1 Automotive Atmel Corporation, ATmega64M1 Automotive Datasheet - Page 153

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ATmega64M1 Automotive

Manufacturer Part Number
ATmega64M1 Automotive
Description
Manufacturer
Atmel Corporation

Specifications of ATmega64M1 Automotive

Flash (kbytes)
64 Kbytes
Pin Count
32
Max. Operating Frequency
16 MHz
Cpu
8-bit AVR
# Of Touch Channels
12
Hardware Qtouch Acquisition
No
Max I/o Pins
27
Ext Interrupts
27
Usb Speed
No
Usb Interface
No
Spi
1
Uart
1
Can
1
Lin
1
Graphic Lcd
No
Video Decoder
No
Camera Interface
No
Adc Channels
11
Adc Resolution (bits)
10
Adc Speed (ksps)
125
Analog Comparators
4
Resistive Touch Screen
No
Dac Channels
1
Dac Resolution (bits)
10
Temp. Sensor
Yes
Crypto Engine
No
Sram (kbytes)
4
Eeprom (bytes)
2048
Self Program Memory
YES
Dram Memory
No
Nand Interface
No
Picopower
No
Temp. Range (deg C)
-40 to 150
I/o Supply Class
2.7 to 5.5
Operating Voltage (vcc)
2.7 to 5.5
Fpu
No
Mpu / Mmu
no / no
Timers
2
Output Compare Channels
14
Input Capture Channels
1
Pwm Channels
10
32khz Rtc
No
Calibrated Rc Oscillator
Yes
14.16.3
14.16.4
14.16.5
14.16.6
14.16.7
7647G–AVR–09/11
PSC Output Compare SA Register – POCRnSAH and POCRnSAL
PSC Output Compare RA Register – POCRnRAH and POCRnRAL
PSCOutput Compare SB Register – POCRnSBH and POCRnSBL
PSC Output Compare RB Register – POCR_RBH and POCR_RBL
PSC Configuration Register – PCNF
Note:
The Output Compare Registers RA, RB, SA and SB contain a 12-bit value that is continuously
compared with the PSC counter value. A match can be used to generate an Output Compare
interrupt, or to generate a waveform output on the associated pin.
The Output Compare Registers are 16bit and 12-bit in size. To ensure that both the high and
low bytes are written simultaneously when the CPU writes to these registers, the access is
performed using an 8-bit temporary high byte register (TEMP). This temporary register is
shared by all the other 16-bit registers.
• Bit 7:6 - not use
not use
• Bit 5 – PULOCK: PSC Update Lock
When this bit is set, the Output Compare Registers POCRnRA, POCRnSA, POCRnSB,
POCR_RB and the PSC Output Configuration Registers POC can be written without disturb-
ing the PSC cycles. The update of the PSC internal registers will be done if the PULOCK bit is
released to zero.
Bit
Read/Write
Initial Value
Bit
Read/Write
Initial Value
Bit
Read/Write
Initial Value
Bit
Read/Write
Initial Value
Bit
Read/Write
Initial Value
n = 0 to 2 according to module number.
R/W
R/W
R/W
R/W
R
7
0
7
0
7
0
7
0
7
0
-
R/W
R/W
R/W
R/W
6
0
6
0
6
0
6
0
R
6
0
-
PULOCK
R/W
R/W
R/W
R/W
R/W
5
0
5
0
5
0
5
0
5
0
Atmel ATmega16/32/64/M1/C1
PMODE
R/W
R/W
R/W
R/W
R/W
POCRnSA[7:0]
POCRnRA[7:0]
POCRnSB[7:0]
POCRnRB[7:0]
4
0
4
0
4
0
4
0
4
0
POPB
R/W
R/W
R/W
R/W
R/W
3
0
3
0
3
0
3
0
3
0
POPA
POCRnRA[11:8]
POCRnSB[11:8]
R/W
POCRnRB[11:8]
POCRnSA[11:8]
R/W
R/W
R/W
R/W
2
0
2
0
2
0
2
0
2
0
R/W
R/W
R/W
R/W
R
1
0
1
0
1
0
1
0
1
0
-
R/W
R/W
R/W
R/W
R
0
0
0
0
0
0
0
0
0
0
-
POCRnSBH
POCRnSAH
POCRnRAH
POCRnRAL
POCR_RBH
POCRnSAL
POCR_RBL
OCRnSBL
PCNF
153

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