ATtiny43U Atmel Corporation, ATtiny43U Datasheet - Page 144

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ATtiny43U

Manufacturer Part Number
ATtiny43U
Description
Manufacturer
Atmel Corporation
Datasheets

Specifications of ATtiny43U

Flash (kbytes)
4 Kbytes
Pin Count
20
Max. Operating Frequency
8 MHz
Cpu
8-bit AVR
# Of Touch Channels
8
Hardware Qtouch Acquisition
No
Max I/o Pins
16
Ext Interrupts
16
Usb Speed
No
Usb Interface
No
Spi
1
Twi (i2c)
1
Graphic Lcd
No
Video Decoder
No
Camera Interface
No
Adc Channels
4
Adc Resolution (bits)
10
Adc Speed (ksps)
15
Analog Comparators
1
Resistive Touch Screen
No
Temp. Sensor
Yes
Crypto Engine
No
Sram (kbytes)
0.25
Eeprom (bytes)
64
Self Program Memory
YES
Dram Memory
No
Nand Interface
No
Picopower
Yes
Temp. Range (deg C)
-40 to 85
I/o Supply Class
0.7 to 5.5
Operating Voltage (vcc)
0.7 to 5.5
Fpu
No
Mpu / Mmu
no / no
Timers
2
Output Compare Channels
4
Pwm Channels
4
32khz Rtc
No
Calibrated Rc Oscillator
Yes
19.6
19.6.1
19.6.2
144
Parallel Programming
ATtiny43U
Enter Programming Mode
Considerations for Efficient Programming
The XA1/XA0 pins determine the action executed when the CLKI pin is given a positive pulse.
The bit coding is shown in
Table 19-12. XA1 and XA0 Coding
When pulsing WR or OE, the command loaded determines the action executed. The different
Commands are shown in
Table 19-13. Command Byte Bit Coding
The following algorithm puts the device in parallel programming mode:
The loaded command and address are retained in the device during programming. For efficient
programming, the following should be considered.
Command Byte
1. Apply 4.5 - 5.5V between V
2. Set RESET to “0” and toggle CLKI at least six times.
3. Set the Prog_enable pins listed in
4. Apply 11.5 - 12.5V to RESET. Any activity on Prog_enable pins within 100 ns after
5. Wait at least 50 µs before sending a new command.
XA1
0
0
1
1
100 ns.
+12V has been applied to RESET, will cause the device to fail entering programming
mode.
1000 0000
0100 0000
0010 0000
0001 0000
0001 0001
0000 1000
0000 0100
0000 0010
0000 0011
XA0
0
1
0
1
Action when CLKI is Pulsed
Load Flash or EEPROM Address (High or low address byte determined by BS1).
Load Data (High or Low data byte for Flash determined by BS1).
Load Command
No Action, Idle
Table
Table
Command Executed
Chip Erase
Write Fuse bits
Write Lock bits
Write Flash
Write EEPROM
Read Signature Bytes and Calibration byte
Read Fuse and Lock bits
Read Flash
Read EEPROM
19-13.
19-12.
CC
and GND.
Table 19-11 on page 143
to “0000” and wait at least
8048B–AVR–03/09

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