ATtiny43U Atmel Corporation, ATtiny43U Datasheet - Page 78

• Manufacturer Part Number: ATtiny43U
• Manufacturer: Atmel Corporation

Specifications of ATtiny43U

• Flash (kbytes): 4 Kbytes
• Pin Count: 20
• Max. Operating Frequency: 8 MHz
• Cpu: 8-bit AVR
• # Of Touch Channels: 8
• Hardware Qtouch Acquisition: No
• Max I/o Pins: 16
• Ext Interrupts: 16
• Usb Speed: No
• Usb Interface: No
• Spi: 1
• Twi (i2c): 1
• Graphic Lcd: No
• Video Decoder: No
• Camera Interface: No
• Adc Channels: 4
• Adc Resolution (bits): 10
• Adc Speed (ksps): 15
• Analog Comparators: 1
• Resistive Touch Screen: No
• Temp. Sensor: Yes
• Crypto Engine: No
• Sram (kbytes): 0.25
• Eeprom (bytes): 64
• Self Program Memory: YES
• Dram Memory: No
• Nand Interface: No
• Picopower: Yes
• Temp. Range (deg C): -40 to 85
• I/o Supply Class: 0.7 to 5.5
• Operating Voltage (vcc): 0.7 to 5.5
• Fpu: No
• Mpu / Mmu: no / no
• Timers: 2
• Output Compare Channels: 4
• Pwm Channels: 4
• 32khz Rtc: No
• Calibrated Rc Oscillator: Yes

11.4
11.4.1
11.4.2
11.4.3
11.4.4
11.4.5
11.4.6
11.4.7
78
Register Description
ATtiny43U
MCUCR – MCU Control Register
PORTA – Port A Data Register
DDRA – Port A Data Direction Register
PINA – Port A Input Pins Address
PORTB – Port B Data Register
DDRB – Port B Data Direction Register
PINB – Port BInput Pins Address
• Bit 6 – PUD: Pull-up Disable
When this bit is written to one, the pull-ups in the I/O ports are disabled even if the DDxn and
PORTxn Registers are configured to enable the pull-ups ({DDxn, PORTxn} = 0b01). See
figuring the Pin” on page 63
Bit
0x35 (0x55)
Read/Write
Initial Value
Bit
0x1B (0x3B)
Read/Write
Initial Value
Bit
0x1A (0x3A)
Read/Write
Initial Value
Bit
0x19 (0x39)
Read/Write
Initial Value
Bit
0x18 (0x38)
Read/Write
Initial Value
Bit
0x17 (0x37)
Read/Write
Initial Value
Bit
0x16 (0x36)
Read/Write
Initial Value
PORTB7
PORTA7
PINA7
PINB7
DDA7
DDB7
R/W
R/W
R/W
R/W
R/W
R/W
BODS
N/A
N/A
R/W
7
0
7
0
7
7
0
7
0
7
7
0
PORTA6
PORTB6
PINA6
PINB6
DDA6
DDB6
R/W
R/W
R/W
R/W
R/W
R/W
N/A
N/A
6
0
6
0
6
6
0
6
0
6
PUD
R/W
6
0
for more details about this feature.
PORTA5
PORTB5
PINA5
PINB5
DDA5
DDB5
R/W
R/W
R/W
R/W
R/W
R/W
N/A
N/A
5
0
5
0
5
5
0
5
0
5
R/W
SE
5
0
PORTB4
PORTA4
PINA4
PINB4
DDA4
DDB4
R/W
R/W
R/W
R/W
R/W
R/W
N/A
N/A
4
0
4
0
4
4
0
4
0
4
SM1
R/W
4
0
PORTB3
PORTA3
PINA3
PINB3
DDA3
DDB3
R/W
R/W
R/W
R/W
R/W
R/W
N/A
N/A
3
0
3
0
3
3
0
3
0
3
SM0
R/W
PORTA2
PORTB2
3
0
PINA2
PINB2
DDA2
DDB2
R/W
R/W
R/W
R/W
R/W
R/W
N/A
N/A
2
0
2
0
2
2
0
2
0
2
BODSE
R/W
PORTB1
PORTA1
PINA1
PINB1
DDB1
2
0
DDA1
R/W
R/W
R/W
R/W
R/W
R/W
N/A
N/A
1
0
1
0
1
1
0
1
0
1
ISC01
R/W
PORTB0
PORTA0
PINA0
PINB0
DDA0
DDB0
1
0
R/W
R/W
R/W
R/W
R/W
R/W
N/A
N/A
0
0
0
0
0
0
0
0
0
0
ISC00
R/W
PORTA
PORTB
DDRA
DDRB
0
0
PINA
PINB
8048B–AVR–03/09
MCUCR
“Con-