ATUC128L4U Atmel Corporation, ATUC128L4U Datasheet - Page 15

• Manufacturer Part Number: ATUC128L4U
• Manufacturer: Atmel Corporation

Specifications of ATUC128L4U

• Flash (kbytes): 128 Kbytes
• Pin Count: 48
• Max. Operating Frequency: 50 MHz
• Cpu: 32-bit AVR
• # Of Touch Channels: 17
• Hardware Qtouch Acquisition: Yes
• Max I/o Pins: 36
• Ext Interrupts: 36
• Usb Transceiver: 1
• Usb Speed: Full Speed
• Usb Interface: Device
• Spi: 1
• Twi (i2c): 2
• Uart: 4
• Lin: 4
• Ssc: 1
• Graphic Lcd: No
• Video Decoder: No
• Camera Interface: No
• Adc Channels: 8
• Adc Resolution (bits): 12
• Adc Speed (ksps): 460
• Analog Comparators: 8
• Resistive Touch Screen: No
• Temp. Sensor: Yes
• Crypto Engine: No
• Sram (kbytes): 16
• Self Program Memory: YES
• Dram Memory: No
• Nand Interface: No
• Picopower: Yes
• Temp. Range (deg C): -40 to 85
• I/o Supply Class: 1.62 to 3.6
• Operating Voltage (vcc): 1.62 to 3.6
• Fpu: No
• Mpu / Mmu: Yes / No
• Timers: 6
• Output Compare Channels: 18
• Input Capture Channels: 12
• Pwm Channels: 35
• 32khz Rtc: Yes
• Calibrated Rc Oscillator: Yes

Table 2-7.
32000D–04/2011
Reg #
0
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
Address
0
4
8
12
16
20
24
28
32
36
40
44
48
52
56
60
64
68
72
76
80
84
88
92
System Registers
The Compliance column describes if the register is Required, Optional or Unused in AVR32A
and AVR32B, see
Table 2-6.
Abbreviation
RA
OA
UA
RB
OB
UB
Name
SR
EVBA
ACBA
CPUCR
ECR
RSR_SUP
RSR_INT0
RSR_INT1
RSR_INT2
RSR_INT3
RSR_EX
RSR_NMI
RSR_DBG
RAR_SUP
RAR_INT0
RAR_INT1
RAR_INT2
RAR_INT3
RAR_EX
RAR_NMI
RAR_DBG
JECR
JOSP
JAVA_LV0
Legend for the Compliance column
Function
Status Register
Exception Vector Base Address
Application Call Base Address
CPU Control Register
Exception Cause Register
Return Status Register for Supervisor context
Return Status Register for INT 0 context
Return Status Register for INT 1 context
Return Status Register for INT 2 context
Return Status Register for INT 3 context
Return Status Register for Exception context
Return Status Register for NMI context
Return Status Register for Debug Mode
Return Address Register for Supervisor context
Return Address Register for INT 0 context
Return Address Register for INT 1 context
Return Address Register for INT 2 context
Return Address Register for INT 3 context
Return Address Register for Exception context
Return Address Register for NMI context
Return Address Register for Debug Mode
Java Exception Cause Register
Java Operand Stack Pointer
Java Local Variable 0
Table 2-6 on page 15
Meaning
Required in AVR32A
Optional in AVR32A
Unused in AVR32A
Required in AVR32B
Optional in AVR32B
Unused in AVR32B
for legend.
Compliance
RA
RA
RA
RA
OA
UA
UA
UA
UA
UA
UA
UA
OA
UA
UA
UA
UA
UA
UA
UA
OA
OA
OA
OA
AVR32
RB
RB
RB
RB
OB
RB
RB
RB
RB
RB
RB
RB
OB
RB
RB
RB
RB
RB
RB
RB
OB
OB
OB
OB
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