ATUC64D3 Atmel Corporation, ATUC64D3 Datasheet - Page 23

• Manufacturer Part Number: ATUC64D3
• Manufacturer: Atmel Corporation

Specifications of ATUC64D3

• Flash (kbytes): 64 Kbytes
• Pin Count: 64
• Max. Operating Frequency: 48 MHz
• Cpu: 32-bit AVR
• # Of Touch Channels: 25
• Hardware Qtouch Acquisition: Yes
• Max I/o Pins: 51
• Ext Interrupts: 51
• Usb Transceiver: 1
• Usb Speed: Full Speed
• Usb Interface: Device
• Spi: 1
• Twi (i2c): 2
• Uart: 3
• Graphic Lcd: No
• Video Decoder: No
• Camera Interface: No
• Adc Channels: 8
• Adc Resolution (bits): 10
• Resistive Touch Screen: No
• Temp. Sensor: No
• Crypto Engine: No
• Sram (kbytes): 16
• Self Program Memory: YES
• Dram Memory: No
• Nand Interface: No
• Picopower: No
• Temp. Range (deg C): -40 to 85
• I/o Supply Class: 3.0 to 3.6
• Operating Voltage (vcc): 3.0 to 3.6
• Fpu: No
• Timers: 3
• Output Compare Channels: 3
• Input Capture Channels: 3
• Pwm Channels: 7
• 32khz Rtc: Yes
• Calibrated Rc Oscillator: Yes

32000D–04/2011
Table 2-8.
Table 2-9 on page 23
Table 2-9.
Name
S
D
R
Name
IMMU SZ
DMMU SZ
CONFIG0 Fields (Continued)
CONFIG1 Fields
Bit
2
1
0
Bit
31:26
25:20
shows the CONFIG1 fields.
Description
SIMD instructions implemented
Value
0
1
DSP instructions implemented
Value
0
1
Memory Read-Modify-Write instructions implemented
Value
0
1
Description
The number of entries in the IMMU equals (IMMU SZ) + 1. Not used
in single-MMU or MPU systems.
Specifies the number of entries in the DMMU or in the shared MMU in
single-MMU systems. The number of entries in the DMMU or shared
MMU equals (DMMU SZ + 1). In systems with MPU, DMMU SZ
equals the number of MPUAR entries.
Semantic
No SIMD instructions
SIMD instructions implemented
Semantic
No DSP instructions
DSP instructions implemented
Semantic
No RMW instructions
RMW instructions implemented
AVR32
23