ATUC64D3 Atmel Corporation, ATUC64D3 Datasheet - Page 241
ATUC64D3
Manufacturer Part Number
ATUC64D3
Description
Manufacturer
Atmel Corporation
Datasheets
1.AT32UC3A0128.pdf
(377 pages)
2.AT32UC3A0128.pdf
(33 pages)
3.AT32UC3A0128.pdf
(159 pages)
4.ATUC128D3.pdf
(755 pages)
5.ATUC128D3.pdf
(69 pages)
Specifications of ATUC64D3
Flash (kbytes)
64 Kbytes
Pin Count
64
Max. Operating Frequency
48 MHz
Cpu
32-bit AVR
# Of Touch Channels
25
Hardware Qtouch Acquisition
Yes
Max I/o Pins
51
Ext Interrupts
51
Usb Transceiver
1
Usb Speed
Full Speed
Usb Interface
Device
Spi
1
Twi (i2c)
2
Uart
3
Graphic Lcd
No
Video Decoder
No
Camera Interface
No
Adc Channels
8
Adc Resolution (bits)
10
Resistive Touch Screen
No
Temp. Sensor
No
Crypto Engine
No
Sram (kbytes)
16
Self Program Memory
YES
Dram Memory
No
Nand Interface
No
Picopower
No
Temp. Range (deg C)
-40 to 85
I/o Supply Class
3.0 to 3.6
Operating Voltage (vcc)
3.0 to 3.6
Fpu
No
Timers
3
Output Compare Channels
3
Input Capture Channels
3
Pwm Channels
7
32khz Rtc
Yes
Calibrated Rc Oscillator
Yes
Available stocks
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Price
- AT32UC3A0128 PDF datasheet
- AT32UC3A0128 PDF datasheet #2
- AT32UC3A0128 PDF datasheet #3
- ATUC128D3 PDF datasheet #4
- ATUC128D3 PDF datasheet #5
- Current page: 241 of 377
- Download datasheet (5Mb)
32000D–04/2011
MULSATWH.W – Multiply Word and Halfword with Saturation into Word
Architecture revision:
Architecture revision1 and higher.
Description
Multiplies the word register with the halfword register specified and stores the upper 32 bits of
the result in the destination word-register. The halfword register is selected as either the high or
low part of Ry. Since the most significant part of the product is stored, no overflow will occur. If
the two operands equal -1, the result is saturated to the largest positive 32-bit fractional number.
Operation:
I.
Syntax:
I.
Operands:
I.
Status Flags:
Opcode:
Example:
31
1
15
0
operand1 = Rx;
If (Ry-part == t) then operand2 = SE(Ry[31:16]) else operand2 = SE(Ry[15:0]);
If ((operand1 == 0x8000_0000) && (operand2 == 0x8000))
else
mulsatwh.w
{d, x, y} ∈ {0, 1, …, 15}
part ∈ {t,b}
Q:
V:
N:
Z:
C:
mulsatwh.wR10, R2, R3:b
will perform R10 ← Sat( R2 × SE(R3[15:0])) >> 15
1
0
29
1
0
Rd ← 0x7FFF_FFFF;
Rd ← (operand1 × operand2) >> 15;
Set if saturation occurred, or previously set.
Not affected.
Not affected.
Not affected.
Not affected.
12
28
0
Rd, Rx, Ry:<part>
11
1
Rx
1
25
1
8
24
0
0
7
0
1
0
0
5
0
0
4
Y
20
0
3
19
Ry
Rd
AVR32
0
16
241
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