ATxmega256A3 Atmel Corporation, ATxmega256A3 Datasheet - Page 375
![no-image](/images/manufacturer_photos/0/0/79/atmel_corporation_sml.jpg)
ATxmega256A3
Manufacturer Part Number
ATxmega256A3
Description
Manufacturer
Atmel Corporation
Specifications of ATxmega256A3
Flash (kbytes)
256 Kbytes
Pin Count
64
Max. Operating Frequency
32 MHz
Cpu
8-bit AVR
# Of Touch Channels
16
Hardware Qtouch Acquisition
No
Max I/o Pins
50
Ext Interrupts
50
Usb Speed
No
Usb Interface
No
Spi
10
Twi (i2c)
2
Uart
7
Graphic Lcd
No
Video Decoder
No
Camera Interface
No
Adc Channels
16
Adc Resolution (bits)
12
Adc Speed (ksps)
2000
Analog Comparators
4
Resistive Touch Screen
No
Dac Channels
2
Dac Resolution (bits)
12
Temp. Sensor
Yes
Crypto Engine
AES/DES
Sram (kbytes)
16
Eeprom (bytes)
4096
Self Program Memory
YES
Dram Memory
No
Nand Interface
No
Picopower
Yes
Temp. Range (deg C)
-40 to 85
I/o Supply Class
1.6 to 3.6
Operating Voltage (vcc)
1.6 to 3.6
Fpu
No
Mpu / Mmu
no / no
Timers
7
Output Compare Channels
22
Input Capture Channels
22
Pwm Channels
22
32khz Rtc
Yes
Calibrated Rc Oscillator
Yes
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Part Number:
ATxmega256A3-AU
Manufacturer:
ATMEL/爱特梅尔
Quantity:
20 000
Part Number:
ATxmega256A3-AUR
Manufacturer:
MICROCHIP/微芯
Quantity:
20 000
Part Number:
ATxmega256A3B-MH
Manufacturer:
ATMEL/爱特梅尔
Quantity:
20 000
Company:
Part Number:
ATxmega256A3BU-AU
Manufacturer:
ST
Quantity:
12 000
Company:
Part Number:
ATxmega256A3BU-MH
Manufacturer:
AAT
Quantity:
400
Company:
Part Number:
ATxmega256A3U-AU
Manufacturer:
TI
Quantity:
12 000
Part Number:
ATxmega256A3U-AU
Manufacturer:
ATMEL/爱特梅尔
Quantity:
20 000
Company:
Part Number:
ATxmega256A3U-MH
Manufacturer:
PANASONIC
Quantity:
1 450
30.11.4
30.11.4.1
8077H–AVR–12/09
EEPROM Programming
Addressing the EEPROM
1.
2.
3.
during self-programming.
The result will be available in the NVM DATA0 register. The CPU is halted during the complete
execution of the command.
The EEPROM can be read and written from application code in any part of the Flash. Its is both
byte and page accessible. This means that either one byte or one page can be written to the
EEPROM at once. One byte is read from the EEPROM during read.
The EEPROM can be accessed through the NVM controller (I/O mapped), similar to the Flash
Program memory, or it can be memory mapped into the Data Memory space to be accessed
similar to SRAM.
When accessing the EEPROM through the NVM Controller, the NVM Address (ADDR) register
is used to address the EEPROM, while the NVM Data (DATA) register is used to store or load
EEPROM data.
For EEPROM page programming the ADDR register can be treated as having two section. The
least significant bits address the bytes within a page, while the most significant bits address the
page within the EEPROM. This is shown in
page (E2BYTE) is held by the bits [1:BYTEMSB] in the ADDR register. The remaining bits
[PAGEMSB:BYTEMSB+1] in the ADDR register holds the EEPROM page address (E2PAGE).
Together E2BYTE and E2PAGE holds an absolute address to a byte in the EEPROM. The size
of E2WORD and E2PAGE will depend on the page and flash size in the device, refer to the
device data sheet for details on this.
Load the NVM ADDR registers with the address to the fuse byte to read.
Load the NVM CMD register with the Read Fuses command.
Set the CMDEX bit in the NVM CTRLA register. This requires the timed CCP sequence
Figure 30-3 on page
376. The byte address in the
XMEGA A
375