R40008 Atmel Corporation, R40008 Datasheet - Page 129

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R40008

Manufacturer Part Number
R40008
Description
Manufacturer
Atmel Corporation
Datasheets

Specifications of R40008

Flash (kbytes)
0 Kbytes
Pin Count
100
Max. Operating Frequency
75 MHz
Cpu
ARM7TDMI
Hardware Qtouch Acquisition
No
Max I/o Pins
32
Ext Interrupts
32
Usb Speed
No
Usb Interface
No
Uart
2
Graphic Lcd
No
Video Decoder
No
Camera Interface
No
Resistive Touch Screen
No
Temp. Sensor
No
Crypto Engine
No
Sram (kbytes)
256
Self Program Memory
NO
External Bus Interface
1
Dram Memory
No
Nand Interface
No
Picopower
No
Temp. Range (deg C)
-40 to 85
I/o Supply Class
3.3
Fpu
No
Mpu / Mmu
no / no
Timers
3
Output Compare Channels
3
Input Capture Channels
3
32khz Rtc
No
Calibrated Rc Oscillator
No
ARM DDI 0029G
Entry into debug state on breakpoint
The ARM7TDMI core marks instructions as being breakpointed as they enter the
instruction pipeline, but the core does not enter debug state until the instruction reaches
the Execute stage.
Breakpointed instructions are not executed. Instead, the processor enters debug state.
When you examine the internal state, you see the state before the breakpointed
instruction. When your examination is complete, remove the breakpoint. This is usually
handled automatically by the debugger which also restarts program execution from the
previously-breakpointed instruction.
When a breakpointed conditional instruction reaches the Execute stage of the pipeline,
the breakpoint is always taken.
The processor enters debug state regardless of whether the condition is met.
A breakpointed instruction does not cause the ARM7TDMI core to enter debug state
when:
BREAKPT
A branch or a write to the PC precedes the breakpointed instruction. In this case,
when the branch is executed, the core flushes the instruction pipeline and so
cancels the breakpoint.
DBGACK
Note
nMREQ
D[31:0]
A[31:0]
MCLK
SEQ
Copyright © 1994-2001. All rights reserved.
Memory cycles
Figure 5-3 Debug state entry
Internal cycles
Debug Interface
5-7

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