SAM3N1C Atmel Corporation, SAM3N1C Datasheet - Page 64

• Manufacturer Part Number: SAM3N1C
• Manufacturer: Atmel Corporation

Specifications of SAM3N1C

• Flash (kbytes): 64 Kbytes
• Pin Count: 100
• Max. Operating Frequency: 48 MHz
• Cpu: Cortex-M3
• # Of Touch Channels: 17
• Hardware Qtouch Acquisition: No
• Max I/o Pins: 34
• Ext Interrupts: 34
• Quadrature Decoder Channels: 2
• Usb Speed: No
• Usb Interface: No
• Spi: 3
• Twi (i2c): 2
• Uart: 4
• Ssc: 1
• Graphic Lcd: No
• Video Decoder: No
• Camera Interface: No
• Adc Channels: 16
• Adc Resolution (bits): 10
• Adc Speed (ksps): 384
• Resistive Touch Screen: No
• Dac Channels: 1
• Dac Resolution (bits): 10
• Temp. Sensor: No
• Crypto Engine: No
• Sram (kbytes): 8
• Self Program Memory: YES
• Dram Memory: No
• Nand Interface: No
• Picopower: No
• Temp. Range (deg C): -40 to 85
• I/o Supply Class: 1.8/3.3
• Operating Voltage (vcc): 1.62 to 3.6
• Fpu: No
• Mpu / Mmu: no / no
• Timers: 6
• Output Compare Channels: 6
• Input Capture Channels: 6
• Pwm Channels: 4
• 32khz Rtc: Yes
• Calibrated Rc Oscillator: Yes

10.6.2.2
10.6.2.3
10.6.2.4
10.6.2.5
10.6.2.6
10.6.2.7
10.6.2.8
64
SAM3N
Non Maskable Interrupt (NMI)
Hard fault
Bus fault
Usage fault
SVCall
PendSV
SysTick
vided by the reset entry in the vector table. Execution restarts as privileged execution in Thread
mode.
A non maskable interrupt (NMI) can be signalled by a peripheral or triggered by software. This is
the highest priority exception other than reset. It is permanently enabled and has a fixed priority
of -2.
NMIs cannot be:
A hard fault is an exception that occurs because of an error during exception processing, or
because an exception cannot be managed by any other exception mechanism. Hard faults have
a fixed priority of -1, meaning they have higher priority than any exception with configurable
priority.
A bus fault is an exception that occurs because of a memory related fault for an instruction or
data memory transaction. This might be from an error detected on a bus in the memory system.
A usage fault is an exception that occurs because of a fault related to instruction execution. This
includes:
The following can cause a usage fault when the core is configured to report them:
A supervisor call (SVC) is an exception that is triggered by the SVC instruction. In an OS envi-
ronment, applications can use SVC instructions to access OS kernel functions and device
drivers.
PendSV is an interrupt-driven request for system-level service. In an OS environment, use
PendSV for context switching when no other exception is active.
A SysTick exception is an exception the system timer generates when it reaches zero. Software
can also generate a SysTick exception. In an OS environment, the processor can use this
exception as system tick.
• Masked or prevented from activation by any other exception.
• Preempted by any exception other than Reset.
• an undefined instruction
• an illegal unaligned access
• invalid state on instruction execution
• an error on exception return.
• an unaligned address on word and halfword memory access
• division by zero.
11011A–ATARM–04-Oct-10