SAM3N2A Atmel Corporation, SAM3N2A Datasheet - Page 158

• Manufacturer Part Number: SAM3N2A
• Manufacturer: Atmel Corporation

Specifications of SAM3N2A

• Flash (kbytes): 128 Kbytes
• Pin Count: 48
• Max. Operating Frequency: 48 MHz
• Cpu: Cortex-M3
• # Of Touch Channels: 23
• Hardware Qtouch Acquisition: No
• Max I/o Pins: 47
• Ext Interrupts: 47
• Quadrature Decoder Channels: 2
• Usb Speed: No
• Usb Interface: No
• Spi: 2
• Twi (i2c): 2
• Uart: 3
• Ssc: 1
• Graphic Lcd: No
• Video Decoder: No
• Camera Interface: No
• Adc Channels: 8
• Adc Resolution (bits): 10
• Adc Speed (ksps): 384
• Resistive Touch Screen: No
• Temp. Sensor: No
• Crypto Engine: No
• Sram (kbytes): 16
• Self Program Memory: YES
• Dram Memory: No
• Nand Interface: No
• Picopower: No
• Temp. Range (deg C): -40 to 85
• I/o Supply Class: 1.8/3.3
• Operating Voltage (vcc): 1.62 to 3.6
• Fpu: No
• Mpu / Mmu: no / no
• Timers: 6
• Output Compare Channels: 6
• Input Capture Channels: 3
• Pwm Channels: 4
• 32khz Rtc: Yes
• Calibrated Rc Oscillator: Yes

10.20.7
10.20.7.1
10.20.7.2
10.20.7.3
158
31
23
15
31
23
15
31
23
15
7
7
7
SAM3N
Interrupt Priority Registers
IPRm
IPR4
IPR3
30
22
14
30
22
14
30
22
14
6
6
6
The IPR0-IPR8 registers provide a 4-bit priority field for each interrupt (See the “Peripheral Iden-
tifiers” section of the datasheet for more details). These registers are byte-accessible. See the
register summary in
fields, that map up to four elements in the CMSIS interrupt priority array IP[0] to IP[32], as shown:
29
21
13
29
21
13
29
21
13
5
5
5
Table 10-27 on page 151
28
20
12
28
20
12
28
20
12
4
4
4
IP[4m+3]
IP[4m+2]
IP[4m+1]
IP[4m]
IP[19]
IP[18]
IP[15]
IP[14]
IP[13]
IP[12]
27
19
11
27
19
11
27
19
11
3
3
3
for their attributes. Each register holds four priority
26
18
10
26
18
10
26
18
10
2
2
2
25
17
25
17
25
17
9
1
9
1
9
1
11011A–ATARM–04-Oct-10
24
16
24
16
24
16
8
0
8
0
8
0