SAM3S1C Atmel Corporation, SAM3S1C Datasheet - Page 562
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SAM3S1C
Manufacturer Part Number
SAM3S1C
Description
Manufacturer
Atmel Corporation
Specifications of SAM3S1C
Flash (kbytes)
64 Kbytes
Pin Count
100
Max. Operating Frequency
64 MHz
Cpu
Cortex-M3
# Of Touch Channels
39
Hardware Qtouch Acquisition
No
Max I/o Pins
34
Ext Interrupts
34
Usb Transceiver
1
Quadrature Decoder Channels
2
Usb Speed
Full Speed
Usb Interface
Device
Spi
3
Twi (i2c)
2
Uart
4
Ssc
1
Sd / Emmc
1
Graphic Lcd
No
Video Decoder
No
Camera Interface
No
Adc Channels
16
Adc Resolution (bits)
12
Adc Speed (ksps)
1000
Analog Comparators
1
Resistive Touch Screen
No
Dac Channels
2
Dac Resolution (bits)
12
Temp. Sensor
Yes
Crypto Engine
No
Sram (kbytes)
16
Self Program Memory
YES
External Bus Interface
1
Dram Memory
No
Nand Interface
Yes
Picopower
No
Temp. Range (deg C)
-40 to 85
I/o Supply Class
1.8/3.3
Operating Voltage (vcc)
1.62 to 3.6
Fpu
No
Mpu / Mmu
Yes / No
Timers
6
Output Compare Channels
6
Input Capture Channels
6
Pwm Channels
4
32khz Rtc
Yes
Calibrated Rc Oscillator
Yes
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• CKG: Transmit Clock Gating Selection
• START: Transmit Start Selection
• STTDLY: Transmit Start Delay
If STTDLY is not 0, a delay of STTDLY clock cycles is inserted between the start event and the actual start of transmission
of data. When the Transmitter is programmed to start synchronously with the Receiver, the delay is also applied.
Note: STTDLY must be set carefully. If STTDLY is too short in respect to TAG (Transmit Sync Data) emission, data is emit-
ted instead of the end of TAG.
• PERIOD: Transmit Period Divider Selection
This field selects the divider to apply to the selected Transmit Clock to generate a new Frame Sync Signal. If 0, no period
signal is generated. If not 0, a period signal is generated at each 2 x (PERIOD+1) Transmit Clock.
562
562
Value
Value
0
1
2
0
1
2
3
4
5
6
7
8
SAM3S
SAM3S
Name
NONE
CONTINUOUS
TRANSFER
Name
CONTINUOUS
RECEIVE
RF_LOW
RF_HIGH
RF_FALLING
RF_RISING
RF_LEVEL
RF_EDGE
CMP_0
Description
None
Transmit Clock enabled only if TF Low
Transmit Clock enabled only if TF High
Description
Continuous, as soon as a word is written in the SSC_THR Register (if Transmit is enabled), and
immediately after the end of transfer of the previous data.
Receive start
Detection of a low level on TF signal
Detection of a high level on TF signal
Detection of a falling edge on TF signal
Detection of a rising edge on TF signal
Detection of any level change on TF signal
Detection of any edge on TF signal
Compare 0
6500C–ATARM–8-Feb-11
6500C–ATARM–8-Feb-11
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