SAM7SE512 Atmel Corporation, SAM7SE512 Datasheet - Page 257
SAM7SE512
Manufacturer Part Number
SAM7SE512
Description
Manufacturer
Atmel Corporation
Specifications of SAM7SE512
Flash (kbytes)
512 Kbytes
Pin Count
144
Max. Operating Frequency
48 MHz
Cpu
ARM7TDMI
Hardware Qtouch Acquisition
No
Max I/o Pins
88
Ext Interrupts
88
Usb Transceiver
1
Usb Speed
Full Speed
Usb Interface
Device
Spi
1
Twi (i2c)
1
Uart
3
Ssc
1
Graphic Lcd
No
Video Decoder
No
Camera Interface
No
Adc Channels
8
Adc Resolution (bits)
10
Adc Speed (ksps)
384
Resistive Touch Screen
No
Temp. Sensor
No
Crypto Engine
No
Sram (kbytes)
32
Self Program Memory
NO
External Bus Interface
1
Dram Memory
sdram
Nand Interface
Yes
Picopower
No
Temp. Range (deg C)
-40 to 85
I/o Supply Class
1.8/3.3
Operating Voltage (vcc)
3.0 to 3.6
Fpu
No
Mpu / Mmu
Yes / No
Timers
3
Output Compare Channels
3
Input Capture Channels
3
Pwm Channels
4
32khz Rtc
Yes
Calibrated Rc Oscillator
No
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Figure 27-10. Fast Forcing
6222F–ATARM–14-Jan-11
Source 0 _ FIQ
Source n
All enabled and pending interrupt sources that have the fast forcing feature enabled and that are
programmed in edge-triggered mode must be cleared by writing to the Interrupt Clear Command
Register. In doing so, they are cleared independently and thus lost interrupts are prevented.
The read of AIC_IVR does not clear the source that has the fast forcing feature enabled.
The source 0, reserved to the fast interrupt, continues operating normally and becomes one of
the Fast Interrupt sources.
Automatic Clear
Automatic Clear
Input Stage
Input Stage
Read IVR if Source n is the current interrupt
and if Fast Forcing is disabled on Source n.
Read FVR if Fast Forcing is
disabled on Sources 1 to 31.
AIC_IPR
AIC_IPR
AIC_IMR
AIC_IMR
AIC_FFSR
SAM7SE512/256/32
Manager
Priority
nIRQ
nFIQ
257
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