SAM7X512 Atmel Corporation, SAM7X512 Datasheet - Page 43

• Manufacturer Part Number: SAM7X512
• Manufacturer: Atmel Corporation

Specifications of SAM7X512

• Flash (kbytes): 512 Kbytes
• Pin Count: 100
• Max. Operating Frequency: 55 MHz
• Cpu: ARM7TDMI
• Hardware Qtouch Acquisition: No
• Max I/o Pins: 62
• Ext Interrupts: 62
• Usb Transceiver: 1
• Usb Speed: Full Speed
• Usb Interface: Device
• Spi: 2
• Twi (i2c): 1
• Uart: 3
• Can: 1
• Ssc: 1
• Ethernet: 1
• Graphic Lcd: No
• Video Decoder: No
• Camera Interface: No
• Adc Channels: 8
• Adc Resolution (bits): 10
• Adc Speed (ksps): 384
• Resistive Touch Screen: No
• Temp. Sensor: No
• Crypto Engine: No
• Sram (kbytes): 128
• Self Program Memory: NO
• Dram Memory: No
• Nand Interface: No
• Picopower: No
• Temp. Range (deg C): -40 to 85
• I/o Supply Class: 3.3
• Operating Voltage (vcc): 3.0 to 3.6
• Fpu: No
• Mpu / Mmu: no / no
• Timers: 3
• Output Compare Channels: 3
• Input Capture Channels: 3
• Pwm Channels: 4
• 32khz Rtc: Yes
• Calibrated Rc Oscillator: No

Table 12-2.
6120GS–ATARM–07-Apr-11
Doc. Rev
6120ES
6120FS
6120GS
Revision History
Comments
Section 6.1 ”JTAG Port Pins”, Section 6.2 ”Test Pin”
Section 8.4.3 ”Internal Flash”,
before the Remap Command.”
Figure 9-1,”System Controller Block Diagram”,
”Features”,
Communication”
Section 12. ”Ordering
Section 12. ”Ordering
Section 9.5 ”Debug Unit”
“Chip ID
Product Series Naming Convention:
Except for part ordering and library references, AT91 prefix dropped from most nomenclature.
AT91SAM7X becomes SAM7X.
“Features”,TWI updated to include Atmel TWI compatibility with I2C Standard.
Section 10.8 ”Two-wire
Section 7.4 ”Peripheral DMA
Section 10.11 ”Timer
Section 10.15 ”Analog-to-Digital
Table 3-1, “Signal Description List”
Registers”, Chip IDs updated with reference to MRL A, B or C.
”Debug Unit
Counter”, The TC has Two output compare or one input capture per channel.
Information”, MLR B parts added to ordering information.
Information”, MLR C parts added to ordering information
Interface”, updated.
(DBGU)”, added
Controller”, added PDC priority list.
updated: “At any time, the Flash is mapped... if GPNVM bit 2 is set and
Converter”, INL and DNL updated.
footnote added to JTAGSEL, ERASE and TST pin comments.
”Mode for General Purpose 2-wire UART Serial
RTT is reset by power_on_reset.
and
SAM7X512/256/128 Summary
Section 6.4 ”ERASE Pin”,
updated.
Change
Request
Ref.
4247
4774
4210
4007
5064
5850
5223
5846
6064
7371
rfo
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