SAM9G15 Atmel Corporation, SAM9G15 Datasheet - Page 475
SAM9G15
Manufacturer Part Number
SAM9G15
Description
Manufacturer
Atmel Corporation
Datasheets
1.SAM9261.pdf
(248 pages)
2.SAM9261.pdf
(1274 pages)
3.SAM9261.pdf
(43 pages)
4.SAM9G15.pdf
(1211 pages)
5.SAM9G15.pdf
(45 pages)
Specifications of SAM9G15
Flash (kbytes)
0 Kbytes
Pin Count
217
Max. Operating Frequency
400 MHz
Cpu
ARM926
Hardware Qtouch Acquisition
No
Max I/o Pins
105
Ext Interrupts
105
Usb Transceiver
3
Usb Speed
Hi-Speed
Usb Interface
Host, Device
Spi
2
Twi (i2c)
3
Uart
6
Lin
4
Ssc
1
Sd / Emmc
2
Graphic Lcd
Yes
Video Decoder
No
Camera Interface
No
Adc Channels
12
Adc Resolution (bits)
10
Adc Speed (ksps)
440
Resistive Touch Screen
Yes
Temp. Sensor
No
Crypto Engine
No
Sram (kbytes)
32
Self Program Memory
NO
External Bus Interface
1
Dram Memory
DDR2/LPDDR, SDRAM/LPSDR
Nand Interface
Yes
Picopower
No
Temp. Range (deg C)
-40 to 85
I/o Supply Class
1.8/3.3
Operating Voltage (vcc)
0.9 to 1.1
Fpu
No
Mpu / Mmu
No/Yes
Timers
6
Output Compare Channels
6
Input Capture Channels
6
Pwm Channels
4
32khz Rtc
Yes
Calibrated Rc Oscillator
No
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31.2.2
11053B–ATARM–22-Sep-11
11053B–ATARM–22-Sep-11
DMA Controller 1
The DMA controller can handle the transfer between peripherals and memory and so receives
the triggers from the peripherals listed below. The hardware interface numbers are also given in
Table
Table 31-2.
Instance name
HSMCI1
SPI1
SPI1
SMD
SMD
TWI1
TWI1
ADC
DBGU
DBGU
UART1
UART1
USART2
USART2
• Two Masters
• Embeds 8 channels
• 16-bytes FIFO per Channel
• features:
– Linked List support with Status Write Back operation at End of Transfer
– Word, HalfWord, Byte transfer support.
– Peripheral to memory
– Memory to peripheral
31-2.
DMA Channel Definition
T/R
RX/TX
TX
RX
TX
RX
TX
RX
RX
TX
RX
TX
RX
TX
RX
DMA Channel HW
interface Number
0
1
2
3
4
5
6
7
8
9
10
11
12
13
SAM9G35
SAM9G35
475
475
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