SAM9G20 Atmel Corporation, SAM9G20 Datasheet - Page 94

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SAM9G20

Manufacturer Part Number
SAM9G20
Description
Manufacturer
Atmel Corporation
Datasheets

Specifications of SAM9G20

Flash (kbytes)
0 Kbytes
Pin Count
217
Max. Operating Frequency
400 MHz
Cpu
ARM926
Hardware Qtouch Acquisition
No
Max I/o Pins
96
Ext Interrupts
96
Usb Transceiver
3
Usb Speed
Full Speed
Usb Interface
Host, Device
Spi
2
Twi (i2c)
1
Uart
7
Ssc
1
Ethernet
1
Sd / Emmc
1
Graphic Lcd
No
Video Decoder
No
Camera Interface
Yes
Adc Channels
4
Adc Resolution (bits)
10
Adc Speed (ksps)
95
Resistive Touch Screen
No
Temp. Sensor
No
Crypto Engine
No
Sram (kbytes)
32
Self Program Memory
NO
External Bus Interface
1
Dram Memory
sdram
Nand Interface
Yes
Picopower
No
Temp. Range (deg C)
-40 to 85
I/o Supply Class
1.8/3.3
Operating Voltage (vcc)
0.9 to 1.1
Fpu
No
Mpu / Mmu
No/Yes
Timers
6
Output Compare Channels
6
Input Capture Channels
6
32khz Rtc
Yes
Calibrated Rc Oscillator
No
Memory Management Unit
3.6.2
3-30
Disabling the MMU
Because the same register, CP15 c1, controls the enabling of the ICache, DCache, and
the MMU, all three can be enabled using a single MCR instruction.
To disable the MMU, clear bit 0 in CP15 c1.
If the MMU is enabled, then disabled, and subsequently re-enabled, the contents of the
TLB are preserved. If these are now invalid, then the TLB must be invalidated before
re-enabling the MMU. See TLB Operations Register c8 on page 2-24.
Copyright © 2001-2003 ARM Limited. All rights reserved.
Note
Note
ARM DDI0198D

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