SAM9XE256 Atmel Corporation, SAM9XE256 Datasheet - Page 713

• Manufacturer Part Number: SAM9XE256
• Manufacturer: Atmel Corporation

Specifications of SAM9XE256

• Flash (kbytes): 256 Kbytes
• Pin Count: 217
• Max. Operating Frequency: 180 MHz
• Cpu: ARM926
• Hardware Qtouch Acquisition: No
• Max I/o Pins: 96
• Ext Interrupts: 96
• Usb Transceiver: 3
• Usb Speed: Full Speed
• Usb Interface: Host, Device
• Spi: 2
• Twi (i2c): 2
• Uart: 6
• Ssc: 1
• Ethernet: 1
• Sd / Emmc: 1
• Graphic Lcd: No
• Video Decoder: No
• Camera Interface: Yes
• Adc Channels: 4
• Adc Resolution (bits): 10
• Adc Speed (ksps): 312
• Resistive Touch Screen: No
• Temp. Sensor: No
• Crypto Engine: No
• Sram (kbytes): 32
• Self Program Memory: NO
• External Bus Interface: 1
• Dram Memory: sdram
• Nand Interface: Yes
• Picopower: No
• Temp. Range (deg C): -40 to 85
• I/o Supply Class: 1.8/3.3
• Operating Voltage (vcc): 1.65 to 1.95
• Fpu: No
• Mpu / Mmu: No / Yes
• Timers: 6
• Output Compare Channels: 6
• Input Capture Channels: 6
• 32khz Rtc: Yes
• Calibrated Rc Oscillator: No

39.5.2
39.5.2.1
713
AT91SAM9XE128/256/512 Preliminary
Handling Transactions with USB V2.0 Device Peripheral
Setup Transaction
Figure 39-4. Control Read and Write Sequences
Notes:
Setup is a special type of host-to-device transaction used during control transfers. Control trans-
fers must be performed using endpoints with no ping-pong attributes. A setup transaction needs
to be handled as soon as possible by the firmware. It is used to transmit requests from the host
to the device. These requests are then handled by the USB device and may require more argu-
ments. The arguments are sent to the device by a Data OUT transaction which follows the setup
transaction. These requests may also return data. The data is carried out to the host by the next
Data IN transaction which follows the setup transaction. A status transaction ends the control
transfer.
When a setup transfer is received by the USB endpoint:
Thus, firmware must detect the RXSETUP polling the UDP_CSRx or catching an interrupt, read
the setup packet in the FIFO, then clear the RXSETUP. RXSETUP cannot be cleared before the
setup packet has been read in the FIFO. Otherwise, the USB device would accept the next Data
OUT transfer and overwrite the setup packet in the FIFO.
• The USB device automatically acknowledges the setup packet
• RXSETUP is set in the UDP_CSRx register
• An endpoint interrupt is generated while the RXSETUP is not cleared. This interrupt is
carried out to the microcontroller if interrupts are enabled for this endpoint.
Control Read
Control Write
No Data
Control
1. During the Status IN stage, the host waits for a zero length packet (Data IN transaction with no
2. During the Status OUT stage, the host emits a zero length packet to the device (Data OUT
data) from the device using DATA1 PID. Refer to Chapter 8 of the Universal Serial Bus Specifi-
cation, Rev. 2.0, for more information on the protocol layer.
transaction with no data).
Setup Stage
Setup Stage
Setup Stage
Setup TX
Setup TX
Setup TX
Status Stage
Status IN TX
Data OUT TX
Data IN TX
Data Stage
Data Stage
Data OUT TX
Data IN TX
6254C–ATARM–22-Jan-10
Status OUT TX
Status Stage
Status IN TX
Status Stage