SAM9XE512 Atmel Corporation, SAM9XE512 Datasheet - Page 105
SAM9XE512
Manufacturer Part Number
SAM9XE512
Description
Manufacturer
Atmel Corporation
Datasheets
1.SAM9260.pdf
(290 pages)
2.SAM9261.pdf
(248 pages)
3.SAM9XE128.pdf
(860 pages)
4.SAM9XE128.pdf
(48 pages)
Specifications of SAM9XE512
Flash (kbytes)
512 Kbytes
Pin Count
217
Max. Operating Frequency
180 MHz
Cpu
ARM926
Hardware Qtouch Acquisition
No
Max I/o Pins
96
Ext Interrupts
96
Usb Transceiver
3
Usb Speed
Full Speed
Usb Interface
Host, Device
Spi
2
Twi (i2c)
2
Uart
6
Ssc
1
Ethernet
1
Sd / Emmc
1
Graphic Lcd
No
Video Decoder
No
Camera Interface
Yes
Adc Channels
4
Adc Resolution (bits)
10
Adc Speed (ksps)
312
Resistive Touch Screen
No
Temp. Sensor
No
Crypto Engine
No
Sram (kbytes)
32
Self Program Memory
NO
External Bus Interface
1
Dram Memory
sdram
Nand Interface
Yes
Picopower
No
Temp. Range (deg C)
-40 to 85
I/o Supply Class
1.8/3.3
Operating Voltage (vcc)
1.65 to 1.95
Fpu
No
Mpu / Mmu
No / Yes
Timers
6
Output Compare Channels
6
Input Capture Channels
6
32khz Rtc
Yes
Calibrated Rc Oscillator
No
- SAM9260 PDF datasheet
- SAM9261 PDF datasheet #2
- SAM9XE128 PDF datasheet #3
- SAM9XE128 PDF datasheet #4
- Current page: 105 of 290
- Download datasheet (5Mb)
4.10.3
4.10.4
4.10.5
ARM DDI 0165B
Data interface, internal cycles
Data interface, merged I-S cycles
Data interface, coprocessor register transfer cycles
During an internal cycle, the ARM9E-S does not require a memory access, as an
internal function is being performed.
The ARM9E-S does not perform merged I-S cycles on the data memory interface.
During a coprocessor register transfer cycle, the ARM9E-S uses the data interface to
transfer data to or from a coprocessor. A memory cycle is not required and the memory
controller does not initiate a transaction.
The coprocessor interface is described in Chapter 6 Coprocessor Interface.
Copyright © 2000 ARM Limited. All rights reserved.
Memory Interface
4-29
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