ATmega48PA Automotive Atmel Corporation, ATmega48PA Automotive Datasheet - Page 21
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ATmega48PA Automotive
Manufacturer Part Number
ATmega48PA Automotive
Description
Manufacturer
Atmel Corporation
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6.4
6.4.1
7701E–AVR–02/11
I/O Memory
General Purpose I/O Registers
The I/O space definition of the Atmel
page
All Atmel ATtiny24/44/84 I/Os and peripherals are placed in the I/O space. All I/O locations
may be accessed by the LD/LDS/LDD and ST/STS/STD instructions, transferring data
between the 32 general purpose working registers and the I/O space. I/O registers within the
address range 0x00 - 0x1F are directly bit-accessible using the SBI and CBI instructions. In
these registers, the value of single bits can be checked by using the SBIS and SBIC instruc-
tions. See the instruction set summary for more details. When using the I/O specific
commands IN and OUT, the I/O addresses 0x00 - 0x3F must be used. When addressing I/O
registers as data space using LD and ST instructions, 0x20 must be added to these
addresses.
For compatibility with future devices, reserved bits should be written with a logical zero if
accessed. Reserved I/O memory addresses should never be written.
Some of the status flags are cleared by writing a logical one to them. Note that, unlike most
other AVR
therefore, be used on registers containing such status flags. The CBI and SBI instructions
work with registers 0x00 to 0x1F only.
The I/O and peripherals control registers are explained in later sections.
The ATtiny24/44/84 contains three General Purpose I/O Registers. These registers can be
used for storing any information, and they are particularly useful for storing global variables
and status flags. General Purpose I/O Registers within the address range 0x00 - 0x1F are
directly bit-accessible using the SBI, CBI, SBIS, and SBIC instructions.
210.
®
s, the CBI and SBI instructions will only operate on the specified bit, and can,
Atmel ATtiny24/44/84 [Preliminary]
®
ATtiny24/44/84 is shown in
“Register Summary” on
21
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