SAM3X8E Atmel Corporation, SAM3X8E Datasheet - Page 33

• Manufacturer Part Number: SAM3X8E
• Manufacturer: Atmel Corporation

7.7
11057AS–ATARM–10-Feb-12
11057AS–ATARM–10-Feb-12
Peripheral DMA Controller
The Peripheral DMA Controller handles transfer requests from the channel according to the fol-
lowing priorities (Low to High priorities):
Table 7-6.
Instance Name
• Handles data transfer between peripherals and memories
• Low bus arbitration overhead
• Next Pointer management for reducing interrupt latency requirement
USART3
USART2
USART1
USART0
USART3
USART2
USART1
USART0
– One Master Clock cycle needed for a transfer from memory to peripheral
– Two Master Clock cycles needed for a transfer from peripheral to memory
UART
UART
PWM
TWI1
TWI0
TWI1
TWI0
ADC
DAC
Peripheral DMA Controller
Channel T/R
Transmit
Transmit
Transmit
Transmit
Transmit
Transmit
Transmit
Transmit
Transmit
Receive
Receive
Receive
Receive
Receive
Receive
Receive
Receive
144 Pins
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
100 Pins
N/A
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
SAM3X/A
SAM3X/A
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