LT1715CMS#PBF Linear Technology, LT1715CMS#PBF Datasheet - Page 15

• Manufacturer Part Number: LT1715CMS#PBF
• Description: IC COMPARATOR 150MHZ DUAL 10MSOP
• Manufacturer: Linear Technology
• Series: UltraFast™r
• Type: General Purposer

Specifications of LT1715CMS#PBF

• Number Of Elements: 2
• Output Type: CMOS, Rail-to-Rail, TTL
• Voltage - Supply: 2.7 V ~ 12 V
• Mounting Type: Surface Mount
• Package / Case: 10-TFSOP, 10-MSOP (0.118", 3.00mm Width)
• Comparator Type: High Speed
• No. Of Comparators: 2
• Response Time: 4ns
• Ic Output Type: CMOS, TTL
• Supply Current: 1mA
• Supply Voltage Range: 2.7V To 12V
• Amplifier Case Style: MSOP
• No. Of Pins: 10
• Rohs Compliant: Yes
• Output Compatibility: CMOS, TTL
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

SI PLIFIED SCHE ATIC
APPLICATIO S I FOR ATIO
PACKAGE DESCRIPTIO
The input trip points test circuit uses a 1kHz triangle wave
to repeatedly trip the comparator being tested. The LT1715
output is used to trigger switched capacitor sampling of
the triangle wave, with a sampler for each direction.
V
–IN
+IN
V
CC
EE
V
W
TRIP
(0.18)
0.007
** DIMENSION DOES NOT INCLUDE INTERLEAD FLASH OR PROTRUSIONS.
* DIMENSION DOES NOT INCLUDE MOLD FLASH, PROTRUSIONS OR GATE BURRS. MOLD FLASH,
Test Circuit
PROTRUSIONS OR GATE BURRS SHALL NOT EXCEED 0.006" (0.152mm) PER SIDE
INTERLEAD FLASH OR PROTRUSIONS SHALL NOT EXCEED 0.006" (0.152mm) PER SIDE
150
150
(0.53 0.015)
0.021 0.006
U
U
W
0 – 6 TYP
Information furnished by Linear Technology Corporation is believed to be accurate and reliable.
However, no responsibility is assumed for its use. Linear Technology Corporation makes no represen-
tation that the interconnection of its circuits as described herein will not infringe on existing patent rights.
W
U
SEATING
PLANE
Dimensions in inches (millimeters) unless otherwise noted.
0.007 – 0.011
(0.17 – 0.27)
U
(LTC DWG # 05-08-1661)
10-Lead Plastic MSOP
(1.10)
0.043
MAX
MS10 Package
0.0197
(0.50)
BSC
Because the triangle wave is attenuated 1000:1 and fed to
the LT1715’s differential input, the sampled voltages are
therefore 1000 times the input trip voltages. The hyster-
esis and offset are computed from the trip points as shown.
0.034
(0.86)
REF
0.005 0.002
(0.13 0.05)
0.193 0.006
(3.00 0.102)
0.118 0.004*
(4.90 0.15)
10
1 2 3 4 5
9
8
7 6
MSOP (MS10) 1100
(3.00 0.102)
LT1715
0.118 0.004**
1715 SS
15
+V
OUTPUT
GND
S