STM32L152V8 STMicroelectronics, STM32L152V8 Datasheet - Page 14
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STM32L152V8
Manufacturer Part Number
STM32L152V8
Description
Ultra-low-power Cortex-M3 MCU with 64 Kbytes Flash, RTC, LCD, USB, ADC
Manufacturer
STMicroelectronics
Datasheet
1.STM32L152VB.pdf
(109 pages)
Specifications of STM32L152V8
Operating Power Supply Range
1.65 V to 3.6 V (without BOR) or 1.8 V to 3.6 V (with BOR option)
Temperature Range
–40 to 85 °C
4 Modes
Sleep, Low-power run (9 μA at 32 kHz), Low-power sleep (4.4 μA),Stop with RTC (1.45 μA), Stop (570 nA), Standby (300 nA)
Ultralow Leakage Per I/o
50 nA
Fast Wakeup From Stop
8 μs
Core
ARM 32-bit Cortex™-M3 CPU
Dma
7-channel DMA controller, supporting timers, ADC, SPIs, I2Cs and USARTs
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Functional overview
Note:
3.2
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The RTC, the IWDG, and the corresponding clock sources are not stopped by entering the
Stop or Standby mode.
ARM
The ARM Cortex™-M3 processor is the latest generation of ARM processors for embedded
systems. It has been developed to provide a low-cost platform that meets the needs of MCU
implementation, with a reduced pin count and low-power consumption, while delivering
outstanding computational performance and an advanced system response to interrupts.
The ARM Cortex™-M3 32-bit RISC processor features exceptional code-efficiency,
delivering the high-performance expected from an ARM core in the memory size usually
associated with 8- and 16-bit devices.
The memory protection unit (MPU) improves system reliability by defining the memory
attributes (such as read/write access permissions) for different memory regions. It provides
up to eight different regions and an optional predefined background region.
Owing to its embedded ARM core, the STM32L15xxx is compatible with all ARM tools and
software.
Nested vectored interrupt controller (NVIC)
The ultralow power STM32L15xxx embeds a nested vectored interrupt controller able to
handle up to 45 maskable interrupt channels (not including the 16 interrupt lines of
Cortex™-M3) and 16 priority levels.
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This hardware block provides flexible interrupt management features with minimal interrupt
latency.
Standby mode (with or without RTC)
The Standby mode is used to achieve the lowest power consumption. The internal
voltage regulator is switched off so that the entire V
PLL, MSI RC, HSI RC and HSE crystal oscillators are also switched off. After entering
Standby mode, the RAM and register contents are lost except for registers in the
Standby circuitry (wakeup logic, IWDG, RTC, LSI, LSE Crystal 32K osc, RCC CSR).
The device exits the Standby mode in 60 µs when an external reset (NRST pin), an
IWDG reset, a rising edge on one of the three WKUP pins, RTC alarm (Alarm A or
Alarm B), RTC tamper event, RTC timestamp event or RTC Wakeup event.
Standby mode consumption: refer to
Closely coupled NVIC gives low-latency interrupt processing
Interrupt entry vector table address passed directly to the core
Closely coupled NVIC core interface
Allows early processing of interrupts
Processing of late arriving, higher-priority interrupts
Support for tail-chaining
Processor state automatically saved
Interrupt entry restored on interrupt exit with no instruction overhead
®
Cortex™-M3 core with MPU
Doc ID 17659 Rev 6
Table
19.
CORE
STM32L151xx, STM32L152xx
domain is powered off. The