STM8AF6248 STMicroelectronics, STM8AF6248 Datasheet - Page 46

• Manufacturer Part Number: STM8AF6248
• Description: STM8AF62 Standard Line
• Manufacturer: STMicroelectronics

Specifications of STM8AF6248

• Max Fcpu: 16 MHz
• Flash Program Memory: 16 to 32 Kbytes Flash; data retention 20 years at 55 °C after 1 kcycle
• Data Memory: 0.5 to 1 Kbyte true data EEPROM; endurance 300 kcycles
• Ram: 1 to 2 Kbytes
• Advanced Control Timer: 16-bit, 4 CAPCOM channels, 3 complementary outputs, dead-time insertion and flexible synchronization

Option bytes
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Table 18.
Option byte no.
OPT10
OPT11
OPT3
OPT4
OPT5
OPT6
OPT7
OPT8
OPT9
Option byte description (continued)
HSITRIM: Trimming option for 16 MHz internal RC oscillator
LSI_EN: Low speed internal clock enable
IWDG_HW: Independent watchdog
WWDG_HW: Window watchdog activation
WWDG_HALT: Window watchdog reset on Halt
EXTCLK: External clock selection
CKAWUSEL: Auto-wakeup unit/clock
PRSC[1:0]: AWU clock prescaler
HSECNT[7:0]: HSE crystal oscillator stabilization time
TMU[3:0]: Enable temporary memory unprotection
Reserved
TMU_KEY 1 [7:0]: Temporary unprotection key 0
TMU_KEY 2 [7:0]: Temporary unprotection key 1
TMU_KEY 3 [7:0]: Temporary unprotection key 2
TMU_KEY 4 [7:0]: Temporary unprotection key 3
0: 3-bit on-the-fly trimming (compatible with devices based on the 128K
silicon)
1: 4-bit on-the-fly trimming
0: LSI clock is not available as CPU clock source
1: LSI clock is available as CPU clock source
0: IWDG independent watchdog activated by software
1: IWDG independent watchdog activated by hardware
0: WWDG window watchdog activated by software
1: WWDG window watchdog activated by hardware
0: No reset generated on Halt if WWDG active
1: Reset generated on Halt if WWDG active
0: External crystal connected to OSCIN/OSCOUT
1: External clock signal on OSCIN
0: LSI clock source selected for AWU
1: HSE clock with prescaler selected as clock source for AWU
00: Reserved
01: 16 MHz to 128 kHz prescaler
10: 8 MHz to 128 kHz prescaler
11: 4 MHz to 128 kHz prescaler
This configures the stabilization time to 0.5, 8, 128, and 2048 HSE
cycles with corresponding option byte values of 0xE1, 0xD2, 0xB4, and
0x00.
0101: TMU disabled (permanent ROP).
Any other value: TMU enabled.
Temporary unprotection key: Must be different from 0x00 or 0xFF
Temporary unprotection key: Must be different from 0x00 or 0xFF
Temporary unprotection key: Must be different from 0x00 or 0xFF
Temporary unprotection key: Must be different from 0x00 or 0xFF
Doc ID 14952 Rev 5
Description
STM8AF61xx, STM8AF62xx